diff options
| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-03-30 19:28:37 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-03-30 19:28:37 +0000 |
| commit | 5a53d2f60d4fa80a39b83537fc4eac303de739e2 (patch) | |
| tree | 4f6147ad2dfe6f276ebc54eff0fb01849840dff6 /lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | |
| parent | f4abfed4f8d5e91178958a31cb70742c4a8cfff0 (diff) | |
[Hexagon] Avoid creating invalid offsets in packetizer
Two memory instructions with a dependency only on the address register
between the two (the first one of them being post-incrememnt) can be
packetized together after the offset on the second was updated to the
incremement value. Make sure that the new offset is valid for the
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonVLIWPacketizer.cpp')
| -rw-r--r-- | lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index 16d3733b92e..135e90be9d9 100644 --- a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -530,6 +530,9 @@ bool HexagonPacketizerList::updateOffset(SUnit *SUI, SUnit *SUJ) { return false; int64_t Offset = MI.getOperand(OPI).getImm(); + if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI)) + return false; + MI.getOperand(OPI).setImm(Offset + Incr); ChangedOffset = Offset; return true; |