diff options
| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-09-15 15:46:05 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-09-15 15:46:05 +0000 |
| commit | a50c5eba3ec8f529c31fde2add1c25a8689e42df (patch) | |
| tree | ac164f446ae34b8861b01d492c187950b076bce7 /lib/Target/Hexagon/HexagonInstrFormats.td | |
| parent | ae3278a7b7ff3e3457d9729aa2a0c36745ecd923 (diff) | |
[Hexagon] Switch to parameterized register classes for HVX
This removes the duplicate HVX instruction set for the 128-byte mode.
Single instruction set now works for both modes (64- and 128-byte).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313362 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrFormats.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonInstrFormats.td | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrFormats.td b/lib/Target/Hexagon/HexagonInstrFormats.td index bc9ee71111e..4da2edc24f3 100644 --- a/lib/Target/Hexagon/HexagonInstrFormats.td +++ b/lib/Target/Hexagon/HexagonInstrFormats.td @@ -31,8 +31,7 @@ def ByteAccess : MemAccessSize<1>; def HalfWordAccess : MemAccessSize<2>; def WordAccess : MemAccessSize<3>; def DoubleWordAccess : MemAccessSize<4>; -def Vector64Access : MemAccessSize<5>; -def Vector128Access : MemAccessSize<6>; +def HVXVectorAccess : MemAccessSize<5>; //===----------------------------------------------------------------------===// |