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author | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
commit | 953c6814730951ad9a286d7991e9c8c481433d45 (patch) | |
tree | 18ceb605903abc4d40e124137fe5d2d3744c44af /lib/Target/AMDGPU/R700Instructions.td | |
parent | 8b8b72ef03c3c7f28ab9f38c462e95046e7a677a (diff) |
R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AMDGPU/R700Instructions.td')
-rw-r--r-- | lib/Target/AMDGPU/R700Instructions.td | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/R700Instructions.td b/lib/Target/AMDGPU/R700Instructions.td new file mode 100644 index 00000000000..613a0d729bb --- /dev/null +++ b/lib/Target/AMDGPU/R700Instructions.td @@ -0,0 +1,21 @@ +//===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TableGen definitions for instructions which are: +// - Available to R700 and newer VLIW4/VLIW5 GPUs +// - Available only on R700 family GPUs. +// +//===----------------------------------------------------------------------===// + +def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">; + +let Predicates = [isR700] in { + def SIN_r700 : SIN_Common<0x6E>; + def COS_r700 : COS_Common<0x6F>; +} |