diff options
| author | Tim Northover <tnorthover@apple.com> | 2017-12-18 10:36:00 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2017-12-18 10:36:00 +0000 |
| commit | f66f36e9a4d53da8801a673a78c6ed42c838d37b (patch) | |
| tree | b8150d4a25f27ccd8c4a937ee1189429ff185a57 /lib/Target/AArch64/AArch64.td | |
| parent | b887495d4b1c3c9e168566e6c09f03ff80de930d (diff) | |
AArch64: work around how Cyclone handles "movi.2d vD, #0".
For Cylone, the instruction "movi.2d vD, #0" is executed incorrectly in some rare
circumstances. Work around the issue conservatively by avoiding the instruction entirely.
This patch changes CodeGen so that problematic instructions are never
generated, and the AsmParser so that an equivalent instruction is used (with a
warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320965 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64.td')
| -rw-r--r-- | lib/Target/AArch64/AArch64.td | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td index 9cb4eafa099..75fb937de9b 100644 --- a/lib/Target/AArch64/AArch64.td +++ b/lib/Target/AArch64/AArch64.td @@ -61,6 +61,12 @@ def FeatureZCRegMove : SubtargetFeature<"zcm", "HasZeroCycleRegMove", "true", def FeatureZCZeroing : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true", "Has zero-cycle zeroing instructions">; +/// ... but the floating-point version doesn't quite work in rare cases on older +/// CPUs. +def FeatureZCZeroingFPWorkaround : SubtargetFeature<"zcz-fp-workaround", + "HasZeroCycleZeroingFPWorkaround", "true", + "The zero-cycle floating-point zeroing instruction has a bug">; + def FeatureStrictAlign : SubtargetFeature<"strict-align", "StrictAlign", "true", "Disallow all unaligned memory " @@ -290,7 +296,8 @@ def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone", FeaturePerfMon, FeatureSlowMisaligned128Store, FeatureZCRegMove, - FeatureZCZeroing + FeatureZCZeroing, + FeatureZCZeroingFPWorkaround ]>; def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1", |