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| author | Lei Liu <lei.liu2@windriver.com> | 2016-09-29 01:05:48 +0000 |
|---|---|---|
| committer | Lei Liu <lei.liu2@windriver.com> | 2016-09-29 01:05:48 +0000 |
| commit | 846f55c8f3429f11130bc6e2b9334c98ebc2e925 (patch) | |
| tree | ab83d30bf5dae9ed69fd00cfd28838e146b34915 /lib/LTO/LTOBackend.cpp | |
| parent | 2f99205bf877fac3c8dd778d380213097f9a5865 (diff) | |
AArch64: Set shift bit of TLSLE HI12 add instruction
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model. This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000.
Reviewers: t.p.northover, peter.smith, rovka
Subscribers: salim.nasser, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D24702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282661 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/LTO/LTOBackend.cpp')
0 files changed, 0 insertions, 0 deletions