diff options
author | Eugene Zelenko <eugene.zelenko@gmail.com> | 2017-09-29 21:55:49 +0000 |
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committer | Eugene Zelenko <eugene.zelenko@gmail.com> | 2017-09-29 21:55:49 +0000 |
commit | 9434811032564095afc3faeaaf683f2be678b4d4 (patch) | |
tree | 8249319716835bc78ce4666fccc6fa08d8de8737 /lib/CodeGen/TwoAddressInstructionPass.cpp | |
parent | 35bfb7ddfe68956c3f8d9b70059aef30769ffb1c (diff) |
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314559 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 45 |
1 files changed, 30 insertions, 15 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 83c00e24d14..efd40b209e9 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1,4 +1,4 @@ -//===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===// +//===- TwoAddressInstructionPass.cpp - Two-Address instruction pass -------===// // // The LLVM Compiler Infrastructure // @@ -28,27 +28,40 @@ //===----------------------------------------------------------------------===// #include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" +#include "llvm/ADT/iterator_range.h" #include "llvm/Analysis/AliasAnalysis.h" +#include "llvm/CodeGen/LiveInterval.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/LiveVariables.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" -#include "llvm/IR/Function.h" +#include "llvm/CodeGen/SlotIndexes.h" +#include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/MCInstrItineraries.h" +#include "llvm/Pass.h" +#include "llvm/Support/CodeGen.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOpcodes.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include <cassert> +#include <iterator> +#include <utility> using namespace llvm; @@ -76,6 +89,7 @@ static cl::opt<unsigned> MaxDataFlowEdge( "the benefit of commuting operands")); namespace { + class TwoAddressInstructionPass : public MachineFunctionPass { MachineFunction *MF; const TargetInstrInfo *TII; @@ -148,14 +162,16 @@ class TwoAddressInstructionPass : public MachineFunctionPass { void processCopy(MachineInstr *MI); - typedef SmallVector<std::pair<unsigned, unsigned>, 4> TiedPairList; - typedef SmallDenseMap<unsigned, TiedPairList> TiedOperandMap; + using TiedPairList = SmallVector<std::pair<unsigned, unsigned>, 4>; + using TiedOperandMap = SmallDenseMap<unsigned, TiedPairList>; + bool collectTiedOperands(MachineInstr *MI, TiedOperandMap&); void processTiedPairs(MachineInstr *MI, TiedPairList&, unsigned &Dist); void eliminateRegSequence(MachineBasicBlock::iterator&); public: static char ID; // Pass identification, replacement for typeid + TwoAddressInstructionPass() : MachineFunctionPass(ID) { initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry()); } @@ -175,17 +191,19 @@ public: /// Pass entry point. bool runOnMachineFunction(MachineFunction&) override; }; + } // end anonymous namespace char TwoAddressInstructionPass::ID = 0; + +char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID; + INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE, "Two-Address instruction pass", false, false) INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE, "Two-Address instruction pass", false, false) -char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID; - static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); /// A two-address instruction has been converted to a three-address instruction @@ -267,7 +285,7 @@ sink3AddrInstruction(MachineInstr *MI, unsigned SavedReg, ++KillPos; unsigned NumVisited = 0; - for (MachineInstr &OtherMI : llvm::make_range(std::next(OldPos), KillPos)) { + for (MachineInstr &OtherMI : make_range(std::next(OldPos), KillPos)) { // DBG_VALUE cannot be counted against the limit. if (OtherMI.isDebugValue()) continue; @@ -452,7 +470,7 @@ static bool isKilled(MachineInstr &MI, unsigned Reg, LiveIntervals *LIS, bool allowFalsePositives) { MachineInstr *DefMI = &MI; - for (;;) { + while (true) { // All uses of physical registers are likely to be kills. if (TargetRegisterInfo::isPhysicalRegister(Reg) && (allowFalsePositives || MRI->hasOneUse(Reg))) @@ -904,7 +922,6 @@ rescheduleMIBelowKill(MachineBasicBlock::iterator &mi, // Move the copies connected to MI down as well. MachineBasicBlock::iterator Begin = MI; MachineBasicBlock::iterator AfterMI = std::next(Begin); - MachineBasicBlock::iterator End = AfterMI; while (End->isCopy() && regOverlapsSet(Defs, End->getOperand(1).getReg(), TRI)) { @@ -916,7 +933,7 @@ rescheduleMIBelowKill(MachineBasicBlock::iterator &mi, unsigned NumVisited = 0; MachineBasicBlock::iterator KillPos = KillMI; ++KillPos; - for (MachineInstr &OtherMI : llvm::make_range(End, KillPos)) { + for (MachineInstr &OtherMI : make_range(End, KillPos)) { // DBG_VALUE cannot be counted against the limit. if (OtherMI.isDebugValue()) continue; @@ -1090,7 +1107,7 @@ rescheduleKillAboveMI(MachineBasicBlock::iterator &mi, // Check if the reschedule will not break depedencies. unsigned NumVisited = 0; for (MachineInstr &OtherMI : - llvm::make_range(mi, MachineBasicBlock::iterator(KillMI))) { + make_range(mi, MachineBasicBlock::iterator(KillMI))) { // DBG_VALUE cannot be counted against the limit. if (OtherMI.isDebugValue()) continue; @@ -1609,7 +1626,6 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI, if (I->end == UseIdx) LI.removeSegment(LastCopyIdx, UseIdx); } - } else if (RemovedKillFlag) { // Some tied uses of regB matched their destination registers, so // regB is still used in this instruction, but a kill flag was @@ -1690,7 +1706,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &Func) { // transformations that may either eliminate the tied operands or // improve the opportunities for coalescing away the register copy. if (TiedOperands.size() == 1) { - SmallVectorImpl<std::pair<unsigned, unsigned> > &TiedPairs + SmallVectorImpl<std::pair<unsigned, unsigned>> &TiedPairs = TiedOperands.begin()->second; if (TiedPairs.size() == 1) { unsigned SrcIdx = TiedPairs[0].first; @@ -1751,7 +1767,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &Func) { /// /// %dst:ssub0<def,undef> = COPY %v1 /// %dst:ssub1<def> = COPY %v2 -/// void TwoAddressInstructionPass:: eliminateRegSequence(MachineBasicBlock::iterator &MBBI) { MachineInstr &MI = *MBBI; |