diff options
author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-06-30 00:01:54 +0000 |
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committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-06-30 00:01:54 +0000 |
commit | 567409db69410d422145e72a29243da1cd606754 (patch) | |
tree | 112d3df99bb21426c06b66ce3fc9b2437338f696 /lib/CodeGen/TwoAddressInstructionPass.cpp | |
parent | cd92e27aafe14a1e92a0726e1f34462753ef1a81 (diff) |
CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr. This is a
general API improvement.
Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other. Instead I've done everything as a block and just
updated what was necessary.
This is mostly mechanical fixes: adding and removing `*` and `&`
operators. The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.
As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.
Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy. I couldn't run tests
for AVR since llc doesn't link with it turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274189 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 1a20824f23e..649a6b906fc 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -647,7 +647,7 @@ bool TwoAddressInstructionPass::commuteInstruction(MachineInstr *MI, unsigned Dist) { unsigned RegC = MI->getOperand(RegCIdx).getReg(); DEBUG(dbgs() << "2addr: COMMUTING : " << *MI); - MachineInstr *NewMI = TII->commuteInstruction(MI, false, RegBIdx, RegCIdx); + MachineInstr *NewMI = TII->commuteInstruction(*MI, false, RegBIdx, RegCIdx); if (NewMI == nullptr) { DEBUG(dbgs() << "2addr: COMMUTING FAILED!\n"); @@ -695,7 +695,7 @@ TwoAddressInstructionPass::convertInstTo3Addr(MachineBasicBlock::iterator &mi, unsigned Dist) { // FIXME: Why does convertToThreeAddress() need an iterator reference? MachineFunction::iterator MFI = MBB->getIterator(); - MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV); + MachineInstr *NewMI = TII->convertToThreeAddress(MFI, *mi, LV); assert(MBB->getIterator() == MFI && "convertToThreeAddress changed iterator reference"); if (!NewMI) @@ -861,7 +861,7 @@ rescheduleMIBelowKill(MachineBasicBlock::iterator &mi, if (!MI->isSafeToMove(AA, SeenStore)) return false; - if (TII->getInstrLatency(InstrItins, MI) > 1) + if (TII->getInstrLatency(InstrItins, *MI) > 1) // FIXME: Needs more sophisticated heuristics. return false; @@ -993,7 +993,7 @@ bool TwoAddressInstructionPass::isDefTooClose(unsigned Reg, unsigned Dist, return true; // Below MI unsigned DefDist = DDI->second; assert(Dist > DefDist && "Visited def already?"); - if (TII->getInstrLatency(InstrItins, &DefMI) > (Dist - DefDist)) + if (TII->getInstrLatency(InstrItins, DefMI) > (Dist - DefDist)) return true; } return false; @@ -1174,7 +1174,7 @@ bool TwoAddressInstructionPass::tryInstructionCommute(MachineInstr *MI, // other commutable operands and does not change the values of passed // variables. if (OtherOpIdx == BaseOpIdx || - !TII->findCommutedOpIndices(MI, BaseOpIdx, OtherOpIdx)) + !TII->findCommutedOpIndices(*MI, BaseOpIdx, OtherOpIdx)) continue; unsigned OtherOpReg = MI->getOperand(OtherOpIdx).getReg(); @@ -1307,9 +1307,9 @@ tryInstructionTransform(MachineBasicBlock::iterator &mi, TII->getRegClass(UnfoldMCID, LoadRegIndex, TRI, *MF)); unsigned Reg = MRI->createVirtualRegister(RC); SmallVector<MachineInstr *, 2> NewMIs; - if (!TII->unfoldMemoryOperand(*MF, &MI, Reg, - /*UnfoldLoad=*/true,/*UnfoldStore=*/false, - NewMIs)) { + if (!TII->unfoldMemoryOperand(*MF, MI, Reg, + /*UnfoldLoad=*/true, + /*UnfoldStore=*/false, NewMIs)) { DEBUG(dbgs() << "2addr: ABANDONING UNFOLD\n"); return false; } |