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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-04-24 18:55:33 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-04-24 18:55:33 +0000
commit36d7c2b2e590d07813f4eb96286ee309a56e46b9 (patch)
tree83b9b2f6c750e1020665cbe9fa6ea280e059a840 /lib/CodeGen/TargetLoweringBase.cpp
parent2b8b0a569500ab4f25932a86b6d74948824dfa1e (diff)
Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions: - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const; - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const; 2. RegisterClass::getAlignment() is replaced by: - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const; This will allow making those values depend on subtarget features in the future. Differential Revision: https://reviews.llvm.org/D31783 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TargetLoweringBase.cpp')
-rw-r--r--lib/CodeGen/TargetLoweringBase.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp
index 27630a3055c..8d7222fb5b2 100644
--- a/lib/CodeGen/TargetLoweringBase.cpp
+++ b/lib/CodeGen/TargetLoweringBase.cpp
@@ -1299,7 +1299,7 @@ TargetLoweringBase::findRepresentativeClass(const TargetRegisterInfo *TRI,
for (int i = SuperRegRC.find_first(); i >= 0; i = SuperRegRC.find_next(i)) {
const TargetRegisterClass *SuperRC = TRI->getRegClass(i);
// We want the largest possible spill size.
- if (SuperRC->getSize() <= BestRC->getSize())
+ if (TRI->getSpillSize(*SuperRC) <= TRI->getSpillSize(*BestRC))
continue;
if (!isLegalRC(SuperRC))
continue;