diff options
author | Matthias Braun <matze@braunis.de> | 2016-11-18 19:43:18 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2016-11-18 19:43:18 +0000 |
commit | 9262f00f1af94df653a610bfc178818b16502dea (patch) | |
tree | e247aff1f9446b14ba3f35e6a1b95fd4c237e833 /lib/CodeGen/RegAllocGreedy.cpp | |
parent | 181c24a90c1c8f27e1cb95684be209470eb3ba34 (diff) |
Timer: Track name and description.
The previously used "names" are rather descriptions (they use multiple
words and contain spaces), use short programming language identifier
like strings for the "names" which should be used when exporting to
machine parseable formats.
Also removed a unused TimerGroup from Hexxagon.
Differential Revision: https://reviews.llvm.org/D25583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287369 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocGreedy.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index 4a381e0aa83..c47cfb1b986 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -869,7 +869,8 @@ unsigned RAGreedy::tryEvict(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs, unsigned CostPerUseLimit) { - NamedRegionTimer T("Evict", TimerGroupName, TimePassesIsEnabled); + NamedRegionTimer T("evict", "Evict", TimerGroupName, TimerGroupDescription, + TimePassesIsEnabled); // Keep track of the cheapest interference seen so far. EvictionCost BestCost; @@ -1967,7 +1968,8 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order, // Local intervals are handled separately. if (LIS->intervalIsInOneMBB(VirtReg)) { - NamedRegionTimer T("Local Splitting", TimerGroupName, TimePassesIsEnabled); + NamedRegionTimer T("local_split", "Local Splitting", TimerGroupName, + TimerGroupDescription, TimePassesIsEnabled); SA->analyze(&VirtReg); unsigned PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs); if (PhysReg || !NewVRegs.empty()) @@ -1975,7 +1977,8 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order, return tryInstructionSplit(VirtReg, Order, NewVRegs); } - NamedRegionTimer T("Global Splitting", TimerGroupName, TimePassesIsEnabled); + NamedRegionTimer T("global_split", "Global Splitting", TimerGroupName, + TimerGroupDescription, TimePassesIsEnabled); SA->analyze(&VirtReg); @@ -2593,7 +2596,8 @@ unsigned RAGreedy::selectOrSplitImpl(LiveInterval &VirtReg, DEBUG(dbgs() << "Do as if this register is in memory\n"); NewVRegs.push_back(VirtReg.reg); } else { - NamedRegionTimer T("Spiller", TimerGroupName, TimePassesIsEnabled); + NamedRegionTimer T("spill", "Spiller", TimerGroupName, + TimerGroupDescription, TimePassesIsEnabled); LiveRangeEdit LRE(&VirtReg, NewVRegs, *MF, *LIS, VRM, this, &DeadRemats); spiller().spill(LRE); setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done); |