diff options
author | Quentin Colombet <qcolombet@apple.com> | 2016-10-13 19:27:48 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2016-10-13 19:27:48 +0000 |
commit | 154f790710ef85dc956d994fcb27b3582e7a75de (patch) | |
tree | 9b9297ea0e81c7628bd0dbea16f4caa99bfb23de /lib/CodeGen/RegAllocGreedy.cpp | |
parent | 19dc709f4b6beb4f3af0cc3767d39c6f3269f296 (diff) |
[RAGreedy] Empty live-ranges always succeed in last chance recoloring.
Relax the constraint for empty live-ranges while doing last chance
recoloring. Indeed, those live-ranges do not need an actual color to be
fond for the recoloring to work.
Empty live-range may happen as a result of splitting/spilling.
Unfortunately no test case for in-tree targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284152 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocGreedy.cpp | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index 644b80bd008..188021c2832 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -2223,10 +2223,21 @@ bool RAGreedy::tryRecoloringCandidates(PQueue &RecoloringQueue, DEBUG(dbgs() << "Try to recolor: " << *LI << '\n'); unsigned PhysReg; PhysReg = selectOrSplitImpl(*LI, NewVRegs, FixedRegisters, Depth + 1); - if (PhysReg == ~0u || !PhysReg) + // When splitting happens, the live-range may actually be empty. + // In that case, this is okay to continue the recoloring even + // if we did not find an alternative color for it. Indeed, + // there will not be anything to color for LI in the end. + if (PhysReg == ~0u || (!PhysReg && !LI->empty())) return false; + + if (!PhysReg) { + assert(LI->empty() && "Only empty live-range do not require a register"); + DEBUG(dbgs() << "Recoloring of " << *LI << " succeeded. Empty LI.\n"); + continue; + } DEBUG(dbgs() << "Recoloring of " << *LI << " succeeded with: " << PrintReg(PhysReg, TRI) << '\n'); + Matrix->assign(*LI, PhysReg); FixedRegisters.insert(LI->reg); } |