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authorMitch Bodart <mitch.l.bodart@intel.com>2016-05-19 16:40:49 +0000
committerMitch Bodart <mitch.l.bodart@intel.com>2016-05-19 16:40:49 +0000
commit27d8b837b707136656931697b461bf59baed11b5 (patch)
treea894ac80067b2c3851f461ff76c0653d8748ae13 /lib/CodeGen/PostRASchedulerList.cpp
parentb29ea6447e0ea7ea66e76617f808f06a7fef8fdd (diff)
CodeGen: Move check of EnablePostRAScheduler to avoid disabling antidependency breaker
Previously, specifying -post-RA-scheduler=true had the side effect of disabling the antidependency breaker, yielding different behavior than if the post-RA-scheduler was enabled via the scheduling model. Differential Revision: http://reviews.llvm.org/D20186 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270077 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/PostRASchedulerList.cpp')
-rw-r--r--lib/CodeGen/PostRASchedulerList.cpp23
1 files changed, 12 insertions, 11 deletions
diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp
index cf8da4bd372..496c2cc9e05 100644
--- a/lib/CodeGen/PostRASchedulerList.cpp
+++ b/lib/CodeGen/PostRASchedulerList.cpp
@@ -103,6 +103,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &Fn) override;
+ private:
bool enablePostRAScheduler(
const TargetSubtargetInfo &ST, CodeGenOpt::Level OptLevel,
TargetSubtargetInfo::AntiDepBreakMode &Mode,
@@ -269,6 +270,11 @@ bool PostRAScheduler::enablePostRAScheduler(
TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const {
Mode = ST.getAntiDepBreakMode();
ST.getCriticalPathRCs(CriticalPathRCs);
+
+ // Check for explicit enable/disable of post-ra scheduling.
+ if (EnablePostRAScheduler.getPosition() > 0)
+ return EnablePostRAScheduler;
+
return ST.enablePostRAScheduler() &&
OptLevel >= ST.getOptLevelToEnablePostRAScheduler();
}
@@ -284,20 +290,15 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
RegClassInfo.runOnMachineFunction(Fn);
- // Check for explicit enable/disable of post-ra scheduling.
TargetSubtargetInfo::AntiDepBreakMode AntiDepMode =
TargetSubtargetInfo::ANTIDEP_NONE;
SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs;
- if (EnablePostRAScheduler.getPosition() > 0) {
- if (!EnablePostRAScheduler)
- return false;
- } else {
- // Check that post-RA scheduling is enabled for this target.
- // This may upgrade the AntiDepMode.
- if (!enablePostRAScheduler(Fn.getSubtarget(), PassConfig->getOptLevel(),
- AntiDepMode, CriticalPathRCs))
- return false;
- }
+
+ // Check that post-RA scheduling is enabled for this target.
+ // This may upgrade the AntiDepMode.
+ if (!enablePostRAScheduler(Fn.getSubtarget(), PassConfig->getOptLevel(),
+ AntiDepMode, CriticalPathRCs))
+ return false;
// Check for antidep breaking override...
if (EnableAntiDepBreaking.getPosition() > 0) {