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authorTim Northover <tnorthover@apple.com>2016-09-15 10:09:59 +0000
committerTim Northover <tnorthover@apple.com>2016-09-15 10:09:59 +0000
commit3d94178ab674a1a37adb4170d99fd2d1cb90a673 (patch)
tree5080fcdb42072ed5894bf1b6d91246a9f5b778af /lib/CodeGen/LowLevelType.cpp
parentccc7ec7f4280176347ff5140aee63b5e28f31fb2 (diff)
GlobalISel: remove "unsized" LLT
It was only really there as a sentinel when instructions had to have precisely one type. Now that registers are typed, each register really has to have a type that is sized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281599 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LowLevelType.cpp')
-rw-r--r--lib/CodeGen/LowLevelType.cpp9
1 files changed, 4 insertions, 5 deletions
diff --git a/lib/CodeGen/LowLevelType.cpp b/lib/CodeGen/LowLevelType.cpp
index 819d85aae5b..fd235f2cfd1 100644
--- a/lib/CodeGen/LowLevelType.cpp
+++ b/lib/CodeGen/LowLevelType.cpp
@@ -35,7 +35,7 @@ LLT::LLT(Type &Ty, const DataLayout &DL) {
ElementsOrAddrSpace = 1;
assert(SizeInBits != 0 && "invalid zero-sized type");
} else {
- Kind = Unsized;
+ Kind = Invalid;
SizeInBits = ElementsOrAddrSpace = 0;
}
}
@@ -45,10 +45,9 @@ void LLT::print(raw_ostream &OS) const {
OS << "<" << ElementsOrAddrSpace << " x s" << SizeInBits << ">";
else if (isPointer())
OS << "p" << getAddressSpace();
- else if (isSized())
+ else if (isValid()) {
+ assert(isScalar() && "unexpected type");
OS << "s" << getScalarSizeInBits();
- else if (isValid())
- OS << "unsized";
- else
+ } else
llvm_unreachable("trying to print an invalid type");
}