diff options
author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-07-14 17:29:46 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-07-14 17:29:46 +0000 |
commit | 3ce051383c0087c084209e68283528bc9f55eb9e (patch) | |
tree | 73519e2d8c4b889c596b2545ccdd781002822ddb /include | |
parent | 4d45f1ed0d9d67979b44626ede1fee01ac90d222 (diff) |
[CodeGen] Simplify reg bank/class union is+get into dyn_cast. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275443 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/CodeGen/MachineRegisterInfo.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 1b9b337531d..07d2d016f27 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -590,9 +590,7 @@ public: /// the select pass, using getRegClass is safe. const TargetRegisterClass *getRegClassOrNull(unsigned Reg) const { const RegClassOrRegBank &Val = VRegInfo[Reg].first; - if (Val.is<const TargetRegisterClass *>()) - return Val.get<const TargetRegisterClass *>(); - return nullptr; + return Val.dyn_cast<const TargetRegisterClass *>(); } /// Return the register bank of \p Reg, or null if Reg has not been assigned @@ -602,9 +600,7 @@ public: /// const RegisterBank *getRegBankOrNull(unsigned Reg) const { const RegClassOrRegBank &Val = VRegInfo[Reg].first; - if (Val.is<const RegisterBank *>()) - return Val.get<const RegisterBank *>(); - return nullptr; + return Val.dyn_cast<const RegisterBank *>(); } /// Return the register bank or register class of \p Reg. |