diff options
| author | Alex Bradbury <asb@lowrisc.org> | 2017-12-11 11:53:54 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-12-11 11:53:54 +0000 |
| commit | 1e4e4646ad97cea37fff44d2734415ff117c03a9 (patch) | |
| tree | 6f546d0b0420ccf51fccbf432ce66764f565fd7d /include | |
| parent | 5e9125c6c72133d2174d896178221c81aa1961ec (diff) | |
[RISCV] Support lowering FrameIndex
Introduces the AddrFI "addressing mode", which is necessary simply because
it's not possible to write a pattern that directly matches a frameindex.
Ensure callee-saved registers are accessed relative to the stackpointer. This
is necessary as callee-saved register spills are performed before the frame
pointer is set.
Move HexagonDAGToDAGISel::isOrEquivalentToAdd to SelectionDAGISel, so we can
make use of it in the RISC-V backend.
Differential Revision: https://reviews.llvm.org/D39848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320353 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index 053ebaa1dda..de6849a1eae 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -276,6 +276,8 @@ public: return false; } + bool isOrEquivalentToAdd(const SDNode *N) const; + private: // Calls to these functions are generated by tblgen. |