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| author | Mark Searles <m.c.searles@gmail.com> | 2017-12-07 21:24:27 +0000 |
|---|---|---|
| committer | Mark Searles <m.c.searles@gmail.com> | 2017-12-07 21:24:27 +0000 |
| commit | f534f4a24f765d802b68b1ff32066ce668a2c566 (patch) | |
| tree | 221128c5044ebb253fc0194b241ee08e90fb9a87 /docs | |
| parent | 82e0652b954a51e3f04d544c09ecddb9973320dc (diff) | |
[AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9
Differential Revision: https://reviews.llvm.org/D40981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320087 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/AMDGPUUsage.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst index ecb0c11dbcb..7d42685bb25 100644 --- a/docs/AMDGPUUsage.rst +++ b/docs/AMDGPUUsage.rst @@ -1549,7 +1549,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment. must be executed with the specified work-group size for Z. - 383:271 14 Reserved, must be 0. + 383:272 14 Reserved, must be 0. bytes 415:384 4 bytes ComputePgmRsrc1 Compute Shader (CS) program settings used by |