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| author | Tony Tye <Tony.Tye@amd.com> | 2017-11-10 20:51:43 +0000 |
|---|---|---|
| committer | Tony Tye <Tony.Tye@amd.com> | 2017-11-10 20:51:43 +0000 |
| commit | 2f2cb6b2a2cdac0fc5822de88c8b70d3d8546d03 (patch) | |
| tree | 7deadb776fda61121131e65d1953532e64e86c89 /docs | |
| parent | 40135026186a9f80ec7922ea729ab098117130ec (diff) | |
[AMDGPU] AMDGPUUsage.rst minor corrections
Differential Revision: https://reviews.llvm.org/D39887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317924 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/AMDGPUUsage.rst | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst index 9ff266e2092..8d402022d47 100644 --- a/docs/AMDGPUUsage.rst +++ b/docs/AMDGPUUsage.rst @@ -2099,7 +2099,9 @@ SGPR register initial state is defined in instructions. Having CP load it once avoids loading it at the beginning of every - wavefront. GFX9 This is the + wavefront. + GFX9 + This is the 64 bit base address of the per SPI scratch backing memory managed by SPI for @@ -2116,18 +2118,17 @@ SGPR register initial state is defined in SGPR which is SGPRn-6 and SGPRn-5. It is used as the FLAT SCRATCH BASE in flat - memory instructions. then - Private Segment Size 1 The - 32 bit byte size of a - (enable_sgpr_private single - work-item's - scratch_segment_size) memory - allocation. This is the - value from the kernel - dispatch packet Private - Segment Byte Size rounded up - by CP to a multiple of - DWORD. + memory instructions. + then Private Segment Size 1 The 32 bit byte size of a + (enable_sgpr_private single + work-item's + scratch_segment_size) memory + allocation. This is the + value from the kernel + dispatch packet Private + Segment Byte Size rounded up + by CP to a multiple of + DWORD. Having CP load it once avoids loading it at the beginning of @@ -2300,6 +2301,7 @@ GFX7-GFX8 DWORD. Having CP load it once avoids loading it at the beginning of every wavefront. The prolog must move it to FLAT_SCRATCH_LO for use as FLAT SCRATCH SIZE. + GFX9 The Flat Scratch Init is the 64 bit address of the base of scratch backing memory being managed by SPI for the queue executing the kernel dispatch. The @@ -3800,7 +3802,7 @@ Assembler --------- AMDGPU backend has LLVM-MC based assembler which is currently in development. -It supports AMDGCN GFX6-GFX8. +It supports AMDGCN GFX6-GFX9. This section describes general syntax for instructions and operands. For more information about instructions, their semantics and supported combinations of |