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authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-18 17:31:09 +0000
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-18 17:31:09 +0000
commit28cb7901b7b2ded05fca10170f4b984d13ffdb04 (patch)
treeb1a58755a4ba79719a92094ea1a1349461770804 /docs
parentafea6f4cd3a6319cb38d6787376b392f9e0e23bb (diff)
AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r--docs/AMDGPUUsage.rst4
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst
index 35611bc6fcd..7a4e8e3a6f4 100644
--- a/docs/AMDGPUUsage.rst
+++ b/docs/AMDGPUUsage.rst
@@ -1208,7 +1208,7 @@ non-AMD key names should be prefixed by "*vendor-name*.".
registers used by
each work-item for
GFX6-GFX9
- "MaxFlatWorkgroupSize" integer Maximum flat
+ "MaxFlatWorkGroupSize" integer Maximum flat
work-group size
supported by the
kernel in work-items.
@@ -1451,7 +1451,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment.
then additional space must
be added to this value for
the call stack.
- 95:64 4 bytes MaxFlatWorkgroupSize Maximum flat work-group
+ 95:64 4 bytes MaxFlatWorkGroupSize Maximum flat work-group
size supported by the
kernel in work-items.
96 1 bit IsDynamicCallStack Indicates if the generated