diff options
| author | Ayman Musa <ayman.musa@intel.com> | 2017-03-07 08:11:19 +0000 |
|---|---|---|
| committer | Ayman Musa <ayman.musa@intel.com> | 2017-03-07 08:11:19 +0000 |
| commit | b59d8041db7c8e15a28d8b9393429b384499f603 (patch) | |
| tree | 0b58f66cb7849cb8242fd5d3d43f753d9238705d /docs/TableGen | |
| parent | 82804ad01f4b662809eaa72601f874f0d063e22c (diff) | |
[X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressing tables.
X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible.
It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals.
This TableGen backend replaces the tables by automatically generating them.
Differential Revision: https://reviews.llvm.org/D30451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297127 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/TableGen')
| -rw-r--r-- | docs/TableGen/BackEnds.rst | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/docs/TableGen/BackEnds.rst b/docs/TableGen/BackEnds.rst index fdab266fa31..993134386f7 100644 --- a/docs/TableGen/BackEnds.rst +++ b/docs/TableGen/BackEnds.rst @@ -228,6 +228,12 @@ CTags format. A helper script, utils/TableGen/tdtags, provides an easier-to-use interface; run 'tdtags -H' for documentation. +X86EVEX2VEX +----------- + +**Purpose**: This X86 specific tablegen backend emits tables that map EVEX +encoded instructions to their VEX encoded identical instruction. + Clang BackEnds ============== |