diff options
| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-18 09:56:40 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-18 09:56:40 +0000 |
| commit | e2d6f91d63a2e8cf77b07794cda7d9ef72504769 (patch) | |
| tree | 8aaa9c82d2ca65020e98eb5954302f1e01a81e2a | |
| parent | 8634b0ee47be832fbf3fd6ceebb8ac9104106bc2 (diff) | |
[SystemZ] Add unsigned compare-and-branch instructions
For some reason I never got around to adding these at the same time as
the signed versions. No idea why.
I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether
it should just be replaced with an "is normal" flag. I'll leave that
for later though.
There are some boundary conditions that can be tweaked, such as preferring
unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256",
but again I'll leave those for a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
33 files changed, 2234 insertions, 156 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index a84ce28c514..6f6b2bffba5 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -794,11 +794,21 @@ SystemZInstrInfo::getBranchInfo(const MachineInstr *MI) const { return SystemZII::Branch(SystemZII::BranchC, SystemZ::CCMASK_ICMP, MI->getOperand(2).getImm(), &MI->getOperand(3)); + case SystemZ::CLIJ: + case SystemZ::CLRJ: + return SystemZII::Branch(SystemZII::BranchCL, SystemZ::CCMASK_ICMP, + MI->getOperand(2).getImm(), &MI->getOperand(3)); + case SystemZ::CGIJ: case SystemZ::CGRJ: return SystemZII::Branch(SystemZII::BranchCG, SystemZ::CCMASK_ICMP, MI->getOperand(2).getImm(), &MI->getOperand(3)); + case SystemZ::CLGIJ: + case SystemZ::CLGRJ: + return SystemZII::Branch(SystemZII::BranchCLG, SystemZ::CCMASK_ICMP, + MI->getOperand(2).getImm(), &MI->getOperand(3)); + default: llvm_unreachable("Unrecognized branch opcode"); } @@ -927,6 +937,14 @@ unsigned SystemZInstrInfo::getCompareAndBranch(unsigned Opcode, return MI && isInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CIJ : 0; case SystemZ::CGHI: return MI && isInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CGIJ : 0; + case SystemZ::CLR: + return SystemZ::CLRJ; + case SystemZ::CLGR: + return SystemZ::CLGRJ; + case SystemZ::CLFI: + return MI && isUInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CLIJ : 0; + case SystemZ::CLGFI: + return MI && isUInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CLGIJ : 0; default: return 0; } diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index 3c4e8af0e61..40fd1b622e6 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -70,10 +70,18 @@ namespace SystemZII { // on the result. BranchC, + // An instruction that peforms a 32-bit unsigned comparison and branches + // on the result. + BranchCL, + // An instruction that peforms a 64-bit signed comparison and branches // on the result. BranchCG, + // An instruction that peforms a 64-bit unsigned comparison and branches + // on the result. + BranchCLG, + // An instruction that decrements a 32-bit register and branches if // the result is nonzero. BranchCT, diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index d98d75ae9a2..d0284616fb7 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -94,6 +94,18 @@ multiclass CompareBranches<Operand ccmask, string pos1, string pos2> { def GIJ : InstRIEc<0xEC7C, (outs), (ins GR64:$R1, imm64sx8:$I2, ccmask:$M3, brtarget16:$RI4), "cgij"##pos1##"\t$R1, $I2, "##pos2##"$RI4", []>; + def LRJ : InstRIEb<0xEC77, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3, + brtarget16:$RI4), + "clrj"##pos1##"\t$R1, $R2, "##pos2##"$RI4", []>; + def LGRJ : InstRIEb<0xEC65, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3, + brtarget16:$RI4), + "clgrj"##pos1##"\t$R1, $R2, "##pos2##"$RI4", []>; + def LIJ : InstRIEc<0xEC7F, (outs), (ins GR32:$R1, imm32zx8:$I2, ccmask:$M3, + brtarget16:$RI4), + "clij"##pos1##"\t$R1, $I2, "##pos2##"$RI4", []>; + def LGIJ : InstRIEc<0xEC7D, (outs), (ins GR64:$R1, imm64zx8:$I2, ccmask:$M3, + brtarget16:$RI4), + "clgij"##pos1##"\t$R1, $I2, "##pos2##"$RI4", []>; } } let isCodeGenOnly = 1 in @@ -152,6 +164,18 @@ multiclass IntCondExtendedMnemonicA<bits<4> ccmask, string name> { def CGI : InstRIEc<0xEC7C, (outs), (ins GR64:$R1, imm64sx8:$I2, brtarget16:$RI4), "cgij"##name##"\t$R1, $I2, $RI4", []>; + def CLR : InstRIEb<0xEC77, (outs), (ins GR32:$R1, GR32:$R2, + brtarget16:$RI4), + "clrj"##name##"\t$R1, $R2, $RI4", []>; + def CLGR : InstRIEb<0xEC65, (outs), (ins GR64:$R1, GR64:$R2, + brtarget16:$RI4), + "clgrj"##name##"\t$R1, $R2, $RI4", []>; + def CLI : InstRIEc<0xEC7F, (outs), (ins GR32:$R1, imm32zx8:$I2, + brtarget16:$RI4), + "clij"##name##"\t$R1, $I2, $RI4", []>; + def CLGI : InstRIEc<0xEC7D, (outs), (ins GR64:$R1, imm64zx8:$I2, + brtarget16:$RI4), + "clgij"##name##"\t$R1, $I2, $RI4", []>; } } multiclass IntCondExtendedMnemonic<bits<4> ccmask, string name1, string name2> diff --git a/lib/Target/SystemZ/SystemZLongBranch.cpp b/lib/Target/SystemZ/SystemZLongBranch.cpp index 114f74e14ac..ba027d46044 100644 --- a/lib/Target/SystemZ/SystemZLongBranch.cpp +++ b/lib/Target/SystemZ/SystemZLongBranch.cpp @@ -225,11 +225,13 @@ TerminatorInfo SystemZLongBranch::describeTerminator(MachineInstr *MI) { Terminator.ExtraRelaxSize = 6; break; case SystemZ::CRJ: - // Relaxes to a CR/BRCL sequence, which is 2 bytes longer. + case SystemZ::CLRJ: + // Relaxes to a C(L)R/BRCL sequence, which is 2 bytes longer. Terminator.ExtraRelaxSize = 2; break; case SystemZ::CGRJ: - // Relaxes to a CGR/BRCL sequence, which is 4 bytes longer. + case SystemZ::CLGRJ: + // Relaxes to a C(L)GR/BRCL sequence, which is 4 bytes longer. Terminator.ExtraRelaxSize = 4; break; case SystemZ::CIJ: @@ -237,6 +239,11 @@ TerminatorInfo SystemZLongBranch::describeTerminator(MachineInstr *MI) { // Relaxes to a C(G)HI/BRCL sequence, which is 4 bytes longer. Terminator.ExtraRelaxSize = 4; break; + case SystemZ::CLIJ: + case SystemZ::CLGIJ: + // Relaxes to a CL(G)FI/BRCL sequence, which is 6 bytes longer. + Terminator.ExtraRelaxSize = 6; + break; default: llvm_unreachable("Unrecognized branch instruction"); } @@ -401,6 +408,18 @@ void SystemZLongBranch::relaxBranch(TerminatorInfo &Terminator) { case SystemZ::CGIJ: splitCompareBranch(Branch, SystemZ::CGHI); break; + case SystemZ::CLRJ: + splitCompareBranch(Branch, SystemZ::CLR); + break; + case SystemZ::CLGRJ: + splitCompareBranch(Branch, SystemZ::CLGR); + break; + case SystemZ::CLIJ: + splitCompareBranch(Branch, SystemZ::CLFI); + break; + case SystemZ::CLGIJ: + splitCompareBranch(Branch, SystemZ::CLGFI); + break; default: llvm_unreachable("Unrecognized branch"); } diff --git a/lib/Target/SystemZ/SystemZOperands.td b/lib/Target/SystemZ/SystemZOperands.td index 421e41f11e6..e1e45412d1f 100644 --- a/lib/Target/SystemZ/SystemZOperands.td +++ b/lib/Target/SystemZ/SystemZOperands.td @@ -333,6 +333,10 @@ def imm64sx8 : Immediate<i64, [{ return isInt<8>(N->getSExtValue()); }], SIMM8, "S8Imm">; +def imm64zx8 : Immediate<i64, [{ + return isUInt<8>(N->getSExtValue()); +}], UIMM8, "U8Imm">; + def imm64sx16 : Immediate<i64, [{ return isInt<16>(N->getSExtValue()); }], SIMM16, "S16Imm">; diff --git a/test/CodeGen/SystemZ/Large/branch-range-09.py b/test/CodeGen/SystemZ/Large/branch-range-09.py new file mode 100644 index 00000000000..b3fd81324da --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-09.py @@ -0,0 +1,107 @@ +# Test 32-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of +# instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffcc bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 12 bytes if it uses a short +# branch and 14 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x34 - 6) / 12 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks +# can use short branches. +# +# CHECK: lb [[REG:%r[0-5]]], 0(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lb [[REG:%r[0-5]]], 1(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 2(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 3(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 4(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 5(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 6(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 7(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# ...main goes here... +# CHECK: lb [[REG:%r[0-5]]], 25(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL:\.L[^ ]*]] +# CHECK: lb [[REG:%r[0-5]]], 26(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 27(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 28(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 29(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 30(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 31(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 32(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffcc + +print 'define void @f1(i8 *%base, i8 *%stop, i32 %limit) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i) + print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i) + print ' %%bext%d = sext i8 %%bcur%d to i32' % (i, i) + print ' %%btest%d = icmp ult i32 %%limit, %%bext%d' % (i, i) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25) + print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i) + print ' %%aext%d = sext i8 %%acur%d to i32' % (i, i) + print ' %%atest%d = icmp ult i32 %%limit, %%aext%d' % (i, i) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-10.py b/test/CodeGen/SystemZ/Large/branch-range-10.py new file mode 100644 index 00000000000..3aeea3ebccd --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-10.py @@ -0,0 +1,111 @@ +# Test 64-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of +# instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffcc bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 12 bytes if it uses a short +# branch and 16 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x34 - 6) / 12 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: lgb [[REG:%r[0-5]]], 0(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lgb [[REG:%r[0-5]]], 1(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 2(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 3(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 4(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLGRJL instead... +# CHECK: lgb [[REG:%r[0-5]]], 5(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 6(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 7(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# ...main goes here... +# CHECK: lgb [[REG:%r[0-5]]], 25(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL:\.L[^ ]*]] +# CHECK: lgb [[REG:%r[0-5]]], 26(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 27(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 28(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 29(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 30(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 31(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 32(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffcc + +print 'define void @f1(i8 *%base, i8 *%stop, i64 %limit) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i) + print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i) + print ' %%bext%d = sext i8 %%bcur%d to i64' % (i, i) + print ' %%btest%d = icmp ult i64 %%limit, %%bext%d' % (i, i) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25) + print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i) + print ' %%aext%d = sext i8 %%acur%d to i64' % (i, i) + print ' %%atest%d = icmp ult i64 %%limit, %%aext%d' % (i, i) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-11.py b/test/CodeGen/SystemZ/Large/branch-range-11.py new file mode 100644 index 00000000000..034902c4a34 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-11.py @@ -0,0 +1,127 @@ +# Test 32-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer +# number of instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffc6 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 14 bytes if it uses a short +# branch and 20 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x3a - 6) / 14 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x3a / 14 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 50 +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 51 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 52 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 53 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 54 +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLIJL instead... +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 55 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 56, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 57, [[LABEL]] +# ...main goes here... +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 100, [[LABEL:\.L[^ ]*]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 101, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 102, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 103, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 104 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 105 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 106 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 107 +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffc6 + +print 'define void @f1(i8 *%base, i32 *%stopa, i32 *%stopb) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bcur%da = load volatile i32 *%%stopa' % i + print ' %%bcur%db = load volatile i32 *%%stopb' % i + print ' %%bsub%d = sub i32 %%bcur%da, %%bcur%db' % (i, i, i) + print ' %%btest%d = icmp ult i32 %%bsub%d, %d' % (i, i, i + 50) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%acur%da = load volatile i32 *%%stopa' % i + print ' %%acur%db = load volatile i32 *%%stopb' % i + print ' %%asub%d = sub i32 %%acur%da, %%acur%db' % (i, i, i) + print ' %%atest%d = icmp ult i32 %%asub%d, %d' % (i, i, i + 100) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-12.py b/test/CodeGen/SystemZ/Large/branch-range-12.py new file mode 100644 index 00000000000..007d477e214 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-12.py @@ -0,0 +1,127 @@ +# Test 64-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer +# number of instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffb4 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 18 bytes if it uses a short +# branch and 24 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x4c - 6) / 18 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x4c / 18 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 50 +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 51 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 52 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 53 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 54 +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLGIJL instead... +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 55 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 56, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 57, [[LABEL]] +# ...main goes here... +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 100, [[LABEL:\.L[^ ]*]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 101, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 102, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 103, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 104 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 105 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 106 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 107 +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffb4 + +print 'define void @f1(i8 *%base, i64 *%stopa, i64 *%stopb) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bcur%da = load volatile i64 *%%stopa' % i + print ' %%bcur%db = load volatile i64 *%%stopb' % i + print ' %%bsub%d = sub i64 %%bcur%da, %%bcur%db' % (i, i, i) + print ' %%btest%d = icmp ult i64 %%bsub%d, %d' % (i, i, i + 50) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%acur%da = load volatile i64 *%%stopa' % i + print ' %%acur%db = load volatile i64 *%%stopb' % i + print ' %%asub%d = sub i64 %%acur%da, %%acur%db' % (i, i, i) + print ' %%atest%d = icmp ult i64 %%asub%d, %d' % (i, i, i + 100) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll index a15fe573493..2b750c46e26 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll @@ -91,8 +91,7 @@ define i8 @f3(i8 *%src, i8 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 39, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -112,7 +111,7 @@ define i8 @f3(i8 *%src, i8 %b) { ; CHECK-SHIFT2-LABEL: f3: ; CHECK-SHIFT2: sll %r3, 24 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -128,8 +127,7 @@ define i8 @f4(i8 *%src, i8 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 39, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -149,7 +147,7 @@ define i8 @f4(i8 *%src, i8 %b) { ; CHECK-SHIFT2-LABEL: f4: ; CHECK-SHIFT2: sll %r3, 24 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjhe {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -196,7 +194,7 @@ define i8 @f6(i8 *%src) { define i8 @f7(i8 *%src) { ; CHECK-LABEL: f7: ; CHECK: llilh [[SRC2:%r[0-9]+]], 256 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0 ; CHECK: br %r14 ; @@ -213,7 +211,7 @@ define i8 @f7(i8 *%src) { define i8 @f8(i8 *%src) { ; CHECK-LABEL: f8: ; CHECK: llilh [[SRC2:%r[0-9]+]], 65024 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0 ; CHECK: br %r14 ; diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll index c0ae883202a..98ffedf28c6 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll @@ -91,8 +91,7 @@ define i16 @f3(i16 *%src, i16 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 47, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -112,7 +111,7 @@ define i16 @f3(i16 *%src, i16 %b) { ; CHECK-SHIFT2-LABEL: f3: ; CHECK-SHIFT2: sll %r3, 16 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -128,8 +127,7 @@ define i16 @f4(i16 *%src, i16 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 47, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -149,7 +147,7 @@ define i16 @f4(i16 *%src, i16 %b) { ; CHECK-SHIFT2-LABEL: f4: ; CHECK-SHIFT2: sll %r3, 16 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjhe {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -196,7 +194,7 @@ define i16 @f6(i16 *%src) { define i16 @f7(i16 *%src) { ; CHECK-LABEL: f7: ; CHECK: llilh [[SRC2:%r[0-9]+]], 1 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0 ; CHECK: br %r14 ; @@ -213,7 +211,7 @@ define i16 @f7(i16 *%src) { define i16 @f8(i16 *%src) { ; CHECK-LABEL: f8: ; CHECK: llilh [[SRC2:%r[0-9]+]], 65534 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0 ; CHECK: br %r14 ; diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll index 3a9485af4f6..418f156b24a 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll @@ -37,9 +37,8 @@ define i32 @f3(i32 %dummy, i32 *%src, i32 %b) { ; CHECK-LABEL: f3: ; CHECK: l %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clr %r2, %r4 ; CHECK: lr [[NEW:%r[0-9]+]], %r2 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle %r2, %r4, [[KEEP:\..*]] ; CHECK: lr [[NEW]], %r4 ; CHECK: cs %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] @@ -53,9 +52,8 @@ define i32 @f4(i32 %dummy, i32 *%src, i32 %b) { ; CHECK-LABEL: f4: ; CHECK: l %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clr %r2, %r4 ; CHECK: lr [[NEW:%r[0-9]+]], %r2 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe %r2, %r4, [[KEEP:\..*]] ; CHECK: lr [[NEW]], %r4 ; CHECK: cs %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll index ebed1475860..9d26d28bc1d 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll @@ -37,9 +37,8 @@ define i64 @f3(i64 %dummy, i64 *%src, i64 %b) { ; CHECK-LABEL: f3: ; CHECK: lg %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clgr %r2, %r4 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]] ; CHECK: lgr [[NEW]], %r4 ; CHECK: csg %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] @@ -53,9 +52,8 @@ define i64 @f4(i64 %dummy, i64 *%src, i64 %b) { ; CHECK-LABEL: f4: ; CHECK: lg %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clgr %r2, %r4 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]] ; CHECK: lgr [[NEW]], %r4 ; CHECK: csg %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] diff --git a/test/CodeGen/SystemZ/branch-05.ll b/test/CodeGen/SystemZ/branch-05.ll index d657c9b8960..b2157b5ac77 100644 --- a/test/CodeGen/SystemZ/branch-05.ll +++ b/test/CodeGen/SystemZ/branch-05.ll @@ -5,8 +5,7 @@ define i32 @f1(i32 %x, i32 %y, i32 %op) { ; CHECK-LABEL: f1: ; CHECK: ahi %r4, -1 -; CHECK: clfi %r4, 5 -; CHECK-NEXT: jh +; CHECK: clijh %r4, 5, ; CHECK: llgfr [[OP64:%r[0-5]]], %r4 ; CHECK: sllg [[INDEX:%r[1-5]]], [[OP64]], 3 ; CHECK: larl [[BASE:%r[1-5]]] diff --git a/test/CodeGen/SystemZ/branch-08.ll b/test/CodeGen/SystemZ/branch-08.ll index c4dc4673dc9..6741d29aec0 100644 --- a/test/CodeGen/SystemZ/branch-08.ll +++ b/test/CodeGen/SystemZ/branch-08.ll @@ -6,14 +6,15 @@ declare void @foo() noreturn ; Check a case where a separate branch is needed and where the original ; order should be reversed. -define i32 @f1(i32 %a, i32 %b) { +define i32 @f1(i32 %a, i32 *%bptr) { ; CHECK-LABEL: f1: -; CHECK: clr %r2, %r3 +; CHECK: cl %r2, 0(%r3) ; CHECK: jl .L[[LABEL:.*]] ; CHECK: br %r14 ; CHECK: .L[[LABEL]]: ; CHECK: brasl %r14, foo@PLT entry: + %b = load i32 *%bptr %cmp = icmp ult i32 %a, %b br i1 %cmp, label %callit, label %return diff --git a/test/CodeGen/SystemZ/branch-09.ll b/test/CodeGen/SystemZ/branch-09.ll new file mode 100644 index 00000000000..5591f5bede6 --- /dev/null +++ b/test/CodeGen/SystemZ/branch-09.ll @@ -0,0 +1,62 @@ +; Test all condition-code masks that are relevant for CLRJ. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +declare i32 @foo() +@g1 = global i16 0 + +define void @f1(i32 %target) { +; CHECK-LABEL: f1: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjle %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ule i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f2(i32 %target) { +; CHECK-LABEL: f2: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjl %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ult i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f3(i32 %target) { +; CHECK-LABEL: f3: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjh %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ugt i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f4(i32 %target) { +; CHECK-LABEL: f4: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp uge i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} diff --git a/test/CodeGen/SystemZ/branch-10.ll b/test/CodeGen/SystemZ/branch-10.ll new file mode 100644 index 00000000000..ec6e759e8e7 --- /dev/null +++ b/test/CodeGen/SystemZ/branch-10.ll @@ -0,0 +1,62 @@ +; Test all condition-code masks that are relevant for CLGRJ. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +declare i64 @foo() +@g1 = global i16 0 + +define void @f1(i64 %target) { +; CHECK-LABEL: f1: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjle %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ule i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f2(i64 %target) { +; CHECK-LABEL: f2: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjl %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ult i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f3(i64 %target) { +; CHECK-LABEL: f3: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjh %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ugt i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f4(i64 %target) { +; CHECK-LABEL: f4: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp uge i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} diff --git a/test/CodeGen/SystemZ/cond-store-01.ll b/test/CodeGen/SystemZ/cond-store-01.ll index 80e6d916144..5b559340198 100644 --- a/test/CodeGen/SystemZ/cond-store-01.ll +++ b/test/CodeGen/SystemZ/cond-store-01.ll @@ -13,7 +13,7 @@ define void @f1(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -29,7 +29,7 @@ define void @f2(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %alt, i8 %orig store i8 %res, i8 *%ptr @@ -46,7 +46,7 @@ define void @f3(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -64,7 +64,7 @@ define void @f4(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -83,7 +83,7 @@ define void @f5(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -101,7 +101,7 @@ define void @f6(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -120,7 +120,7 @@ define void @f7(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -138,7 +138,7 @@ define void @f8(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -157,7 +157,7 @@ define void @f9(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -175,7 +175,7 @@ define void @f10(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -194,7 +194,7 @@ define void @f11(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 4095 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -211,7 +211,7 @@ define void @f12(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 4096 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -228,7 +228,7 @@ define void @f13(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 524287 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -247,7 +247,7 @@ define void @f14(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 524288 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -264,7 +264,7 @@ define void @f15(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 -524288 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -283,7 +283,7 @@ define void @f16(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 -524289 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -302,7 +302,7 @@ define void @f17(i64 %base, i64 %index, i8 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i8 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -317,7 +317,7 @@ define void @f18(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -332,7 +332,7 @@ define void @f19(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store volatile i8 %res, i8 *%ptr @@ -352,7 +352,7 @@ define void @f20(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i8 *%ptr unordered, align 1 %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -368,7 +368,7 @@ define void @f21(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store atomic i8 %res, i8 *%ptr unordered, align 1 @@ -388,7 +388,7 @@ define void @f22(i8 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i8 call void @foo(i8 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-02.ll b/test/CodeGen/SystemZ/cond-store-02.ll index e01a8531bcd..9e188437a5f 100644 --- a/test/CodeGen/SystemZ/cond-store-02.ll +++ b/test/CodeGen/SystemZ/cond-store-02.ll @@ -13,7 +13,7 @@ define void @f1(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -29,7 +29,7 @@ define void @f2(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %alt, i16 %orig store i16 %res, i16 *%ptr @@ -46,7 +46,7 @@ define void @f3(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -64,7 +64,7 @@ define void @f4(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -83,7 +83,7 @@ define void @f5(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -101,7 +101,7 @@ define void @f6(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -120,7 +120,7 @@ define void @f7(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -138,7 +138,7 @@ define void @f8(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -157,7 +157,7 @@ define void @f9(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -175,7 +175,7 @@ define void @f10(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -194,7 +194,7 @@ define void @f11(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 2047 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -211,7 +211,7 @@ define void @f12(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 2048 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -228,7 +228,7 @@ define void @f13(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 262143 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -247,7 +247,7 @@ define void @f14(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 262144 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -264,7 +264,7 @@ define void @f15(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 -262144 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -283,7 +283,7 @@ define void @f16(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 -262145 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -302,7 +302,7 @@ define void @f17(i64 %base, i64 %index, i16 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i16 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -317,7 +317,7 @@ define void @f18(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -332,7 +332,7 @@ define void @f19(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store volatile i16 %res, i16 *%ptr @@ -352,7 +352,7 @@ define void @f20(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i16 *%ptr unordered, align 2 %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -368,7 +368,7 @@ define void @f21(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store atomic i16 %res, i16 *%ptr unordered, align 2 @@ -388,7 +388,7 @@ define void @f22(i16 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i16 call void @foo(i16 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-03.ll b/test/CodeGen/SystemZ/cond-store-03.ll index e122bc26ac4..d4fd48d6132 100644 --- a/test/CodeGen/SystemZ/cond-store-03.ll +++ b/test/CodeGen/SystemZ/cond-store-03.ll @@ -13,7 +13,7 @@ define void @f1(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -29,7 +29,7 @@ define void @f2(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %alt, i32 %orig store i32 %res, i32 *%ptr @@ -46,7 +46,7 @@ define void @f3(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = sext i32 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -64,7 +64,7 @@ define void @f4(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = sext i32 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -83,7 +83,7 @@ define void @f5(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = zext i32 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -101,7 +101,7 @@ define void @f6(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = zext i32 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -120,7 +120,7 @@ define void @f7(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 1023 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -137,7 +137,7 @@ define void @f8(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 1024 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -154,7 +154,7 @@ define void @f9(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 131071 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -173,7 +173,7 @@ define void @f10(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -190,7 +190,7 @@ define void @f11(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 -131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -209,7 +209,7 @@ define void @f12(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 -131073 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -228,7 +228,7 @@ define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i32 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -243,7 +243,7 @@ define void @f14(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -258,7 +258,7 @@ define void @f15(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store volatile i32 %res, i32 *%ptr @@ -277,7 +277,7 @@ define void @f16(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i32 *%ptr unordered, align 4 %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -293,7 +293,7 @@ define void @f17(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-5]}}, %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store atomic i32 %res, i32 *%ptr unordered, align 4 @@ -313,7 +313,7 @@ define void @f18(i32 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i32 call void @foo(i32 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-04.ll b/test/CodeGen/SystemZ/cond-store-04.ll index 4ed23a364ad..fc565c432ff 100644 --- a/test/CodeGen/SystemZ/cond-store-04.ll +++ b/test/CodeGen/SystemZ/cond-store-04.ll @@ -13,7 +13,7 @@ define void @f1(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stg %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -29,7 +29,7 @@ define void @f2(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stg %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %alt, i64 %orig store i64 %res, i64 *%ptr @@ -46,7 +46,7 @@ define void @f3(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 65535 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -65,7 +65,7 @@ define void @f4(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -82,7 +82,7 @@ define void @f5(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 -65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -101,7 +101,7 @@ define void @f6(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 -65537 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -120,7 +120,7 @@ define void @f7(i64 %base, i64 %index, i64 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 524287 %ptr = inttoptr i64 %add2 to i64 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -135,7 +135,7 @@ define void @f8(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -150,7 +150,7 @@ define void @f9(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store volatile i64 %res, i64 *%ptr @@ -169,7 +169,7 @@ define void @f10(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i64 *%ptr unordered, align 8 %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -185,7 +185,7 @@ define void @f11(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: csg {{%r[0-5]}}, %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store atomic i64 %res, i64 *%ptr unordered, align 8 @@ -205,7 +205,7 @@ define void @f12(i64 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i64 call void @foo(i64 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-05.ll b/test/CodeGen/SystemZ/cond-store-05.ll index e41c8fe4f68..f8056f73c92 100644 --- a/test/CodeGen/SystemZ/cond-store-05.ll +++ b/test/CodeGen/SystemZ/cond-store-05.ll @@ -13,7 +13,7 @@ define void @f1(float *%ptr, float %alt, i32 %limit) { ; CHECK: ste %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -29,7 +29,7 @@ define void @f2(float *%ptr, float %alt, i32 %limit) { ; CHECK: ste %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %alt, float %orig store float %res, float *%ptr @@ -46,7 +46,7 @@ define void @f3(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 1023 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -63,7 +63,7 @@ define void @f4(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 1024 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -80,7 +80,7 @@ define void @f5(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 131071 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -99,7 +99,7 @@ define void @f6(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -116,7 +116,7 @@ define void @f7(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 -131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -135,7 +135,7 @@ define void @f8(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 -131073 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -154,7 +154,7 @@ define void @f9(i64 %base, i64 %index, float %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to float * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -169,7 +169,7 @@ define void @f10(float *%ptr, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: ste {{%f[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -184,7 +184,7 @@ define void @f11(float *%ptr, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: ste %f0, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store volatile float %res, float *%ptr @@ -204,7 +204,7 @@ define void @f12(float %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca float call void @foo(float *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-06.ll b/test/CodeGen/SystemZ/cond-store-06.ll index 759a3e05615..66681958d47 100644 --- a/test/CodeGen/SystemZ/cond-store-06.ll +++ b/test/CodeGen/SystemZ/cond-store-06.ll @@ -13,7 +13,7 @@ define void @f1(double *%ptr, double %alt, i32 %limit) { ; CHECK: std %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -29,7 +29,7 @@ define void @f2(double *%ptr, double %alt, i32 %limit) { ; CHECK: std %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %alt, double %orig store double %res, double *%ptr @@ -46,7 +46,7 @@ define void @f3(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 511 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -63,7 +63,7 @@ define void @f4(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 512 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -80,7 +80,7 @@ define void @f5(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 65535 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -99,7 +99,7 @@ define void @f6(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -116,7 +116,7 @@ define void @f7(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 -65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -135,7 +135,7 @@ define void @f8(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 -65537 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -154,7 +154,7 @@ define void @f9(i64 %base, i64 %index, double %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 524287 %ptr = inttoptr i64 %add2 to double * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -169,7 +169,7 @@ define void @f10(double *%ptr, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: std {{%f[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -184,7 +184,7 @@ define void @f11(double *%ptr, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: std %f0, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store volatile double %res, double *%ptr @@ -204,7 +204,7 @@ define void @f12(double %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca double call void @foo(double *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr diff --git a/test/CodeGen/SystemZ/int-cmp-03.ll b/test/CodeGen/SystemZ/int-cmp-03.ll index 9602d54e5c7..aa654e086dc 100644 --- a/test/CodeGen/SystemZ/int-cmp-03.ll +++ b/test/CodeGen/SystemZ/int-cmp-03.ll @@ -5,8 +5,7 @@ ; Check register comparison. define double @f1(double %a, double %b, i32 %i1, i32 %i2) { ; CHECK-LABEL: f1: -; CHECK: clr %r2, %r3 -; CHECK-NEXT: jl +; CHECK: clrjl %r2, %r3 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i32 %i1, %i2 diff --git a/test/CodeGen/SystemZ/int-cmp-08.ll b/test/CodeGen/SystemZ/int-cmp-08.ll index b6f48d31815..ebf158a1144 100644 --- a/test/CodeGen/SystemZ/int-cmp-08.ll +++ b/test/CodeGen/SystemZ/int-cmp-08.ll @@ -5,8 +5,7 @@ ; Check CLGR. define double @f1(double %a, double %b, i64 %i1, i64 %i2) { ; CHECK-LABEL: f1: -; CHECK: clgr %r2, %r3 -; CHECK-NEXT: jl +; CHECK: clgrjl %r2, %r3 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i64 %i1, %i2 diff --git a/test/CodeGen/SystemZ/int-cmp-10.ll b/test/CodeGen/SystemZ/int-cmp-10.ll index e30e014319d..4d4c4bbd20d 100644 --- a/test/CodeGen/SystemZ/int-cmp-10.ll +++ b/test/CodeGen/SystemZ/int-cmp-10.ll @@ -2,12 +2,11 @@ ; ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -; Check a value near the low end of the range. We use CFI for comparisons -; with zero, or things that are equivalent to them. +; Check a value near the low end of the range. We use signed forms for +; comparisons with zero, or things that are equivalent to them. define double @f1(double %a, double %b, i32 %i1) { ; CHECK-LABEL: f1: -; CHECK: clfi %r2, 1 -; CHECK-NEXT: jh +; CHECK: clijh %r2, 1 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ugt i32 %i1, 1 @@ -15,9 +14,32 @@ define double @f1(double %a, double %b, i32 %i1) { ret double %res } -; Check a value near the high end of the range. +; Check the top of the CLIJ range. define double @f2(double %a, double %b, i32 %i1) { ; CHECK-LABEL: f2: +; CHECK: clijl %r2, 255 +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i32 %i1, 255 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the next value up, which needs a separate comparison. +define double @f3(double %a, double %b, i32 %i1) { +; CHECK-LABEL: f3: +; CHECK: clfi %r2, 256 +; CHECK: jl +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i32 %i1, 256 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check a value near the high end of the range. +define double @f4(double %a, double %b, i32 %i1) { +; CHECK-LABEL: f4: ; CHECK: clfi %r2, 4294967280 ; CHECK-NEXT: jl ; CHECK: ldr %f0, %f2 diff --git a/test/CodeGen/SystemZ/int-cmp-12.ll b/test/CodeGen/SystemZ/int-cmp-12.ll index f57f6eca879..077b22423e0 100644 --- a/test/CodeGen/SystemZ/int-cmp-12.ll +++ b/test/CodeGen/SystemZ/int-cmp-12.ll @@ -2,12 +2,11 @@ ; ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -; Check a value near the low end of the range. We use CGFI for comparisons -; with zero, or things that are equivalent to them. +; Check a value near the low end of the range. We use signed forms for +; comparisons with zero, or things that are equivalent to them. define double @f1(double %a, double %b, i64 %i1) { ; CHECK-LABEL: f1: -; CHECK: clgfi %r2, 1 -; CHECK-NEXT: jh +; CHECK: clgijh %r2, 1 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ugt i64 %i1, 1 @@ -15,9 +14,32 @@ define double @f1(double %a, double %b, i64 %i1) { ret double %res } -; Check the high end of the CLGFI range. +; Check the top of the CLGIJ range. define double @f2(double %a, double %b, i64 %i1) { ; CHECK-LABEL: f2: +; CHECK: clgijl %r2, 255 +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i64 %i1, 255 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the next value up, which needs a separate comparison. +define double @f3(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f3: +; CHECK: clgfi %r2, 256 +; CHECK: jl +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i64 %i1, 256 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the high end of the CLGFI range. +define double @f4(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f4: ; CHECK: clgfi %r2, 4294967295 ; CHECK-NEXT: jl ; CHECK: ldr %f0, %f2 @@ -28,10 +50,9 @@ define double @f2(double %a, double %b, i64 %i1) { } ; Check the next value up, which must use a register comparison. -define double @f3(double %a, double %b, i64 %i1) { -; CHECK-LABEL: f3: -; CHECK: clgr %r2, -; CHECK-NEXT: jl +define double @f5(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f5: +; CHECK: clgrjl %r2, ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i64 %i1, 4294967296 diff --git a/test/CodeGen/SystemZ/int-cmp-20.ll b/test/CodeGen/SystemZ/int-cmp-20.ll index 7ecde77ddd4..98c41cd3a24 100644 --- a/test/CodeGen/SystemZ/int-cmp-20.ll +++ b/test/CodeGen/SystemZ/int-cmp-20.ll @@ -63,7 +63,7 @@ define double @f4(double %a, double %b, i8 *%ptr) { ; extension. The condition is always true. define double @f5(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f5: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = zext i8 %val to i32 @@ -79,7 +79,7 @@ define double @f5(double %a, double %b, i8 *%ptr) { ; and simply ignore CLI for this range. First check the low end of the range. define double @f6(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f6: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -91,7 +91,7 @@ define double @f6(double %a, double %b, i8 *%ptr) { ; ...and then the high end. define double @f7(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f7: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -118,7 +118,7 @@ define double @f8(double %a, double %b, i8 *%ptr) { ; extension. This cannot use CLI. define double @f9(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f9: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -145,7 +145,7 @@ define double @f10(double %a, double %b, i8 *%ptr) { ; extension. This cannot use CLI. define double @f11(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f11: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -158,7 +158,7 @@ define double @f11(double %a, double %b, i8 *%ptr) { ; extension. The condition is always true. define double @f12(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f12: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = zext i8 %val to i32 diff --git a/test/CodeGen/SystemZ/int-cmp-37.ll b/test/CodeGen/SystemZ/int-cmp-37.ll index dc11a5cba74..8095ed17301 100644 --- a/test/CodeGen/SystemZ/int-cmp-37.ll +++ b/test/CodeGen/SystemZ/int-cmp-37.ll @@ -86,8 +86,7 @@ define i32 @f5(i32 %src1) { ; CHECK-LABEL: f5: ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT ; CHECK: llh [[VAL:%r[0-5]]], 0([[REG]]) -; CHECK: clr %r2, [[VAL]] -; CHECK-NEXT: jl +; CHECK: clrjl %r2, [[VAL]], ; CHECK: br %r14 entry: %val = load i16 *@h, align 1 diff --git a/test/CodeGen/SystemZ/int-cmp-40.ll b/test/CodeGen/SystemZ/int-cmp-40.ll index 201d8b2fb98..9c532f1cbc6 100644 --- a/test/CodeGen/SystemZ/int-cmp-40.ll +++ b/test/CodeGen/SystemZ/int-cmp-40.ll @@ -86,8 +86,7 @@ define i64 @f5(i64 %src1) { ; CHECK-LABEL: f5: ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT ; CHECK: llgh [[VAL:%r[0-5]]], 0([[REG]]) -; CHECK: clgr %r2, [[VAL]] -; CHECK-NEXT: jl +; CHECK: clgrjl %r2, [[VAL]], ; CHECK: br %r14 entry: %val = load i16 *@h, align 1 diff --git a/test/MC/Disassembler/SystemZ/insns-pcrel.txt b/test/MC/Disassembler/SystemZ/insns-pcrel.txt index c250f199792..b7edab65e70 100644 --- a/test/MC/Disassembler/SystemZ/insns-pcrel.txt +++ b/test/MC/Disassembler/SystemZ/insns-pcrel.txt @@ -1362,3 +1362,371 @@ # 0x000007aa: # CHECK: pfdrl 15, 0x1000007a8 0xc6 0xf2 0x7f 0xff 0xff 0xff + +# 0x000007b0: +# CHECK: clgrj %r0, %r0, 0, 0x7b0 +0xec 0x00 0x00 0x00 0x00 0x65 + +# 0x000007b6: +# CHECK: clgrj %r0, %r15, 0, 0x7b6 +0xec 0x0f 0x00 0x00 0x00 0x65 + +# 0x000007bc: +# CHECK: clgrj %r15, %r0, 0, 0x7bc +0xec 0xf0 0x00 0x00 0x00 0x65 + +# 0x000007c2: +# CHECK: clgrj %r7, %r8, 0, 0x7c2 +0xec 0x78 0x00 0x00 0x00 0x65 + +# 0x000007c8: +# CHECK: clgrj %r0, %r0, 0, 0x7c6 +0xec 0x00 0xff 0xff 0x00 0x65 + +# 0x000007ce: +# CHECK: clgrj %r0, %r0, 0, 0xffffffffffff07ce +0xec 0x00 0x80 0x00 0x00 0x65 + +# 0x000007d4: +# CHECK: clgrj %r0, %r0, 0, 0x107d2 +0xec 0x00 0x7f 0xff 0x00 0x65 + +# 0x000007da: +# CHECK: clgrj %r0, %r0, 1, 0x7da +0xec 0x00 0x00 0x00 0x10 0x65 + +# 0x000007e0: +# CHECK: clgrjh %r0, %r0, 0x7e0 +0xec 0x00 0x00 0x00 0x20 0x65 + +# 0x000007e6: +# CHECK: clgrj %r0, %r0, 3, 0x7e6 +0xec 0x00 0x00 0x00 0x30 0x65 + +# 0x000007ec: +# CHECK: clgrjl %r0, %r0, 0x7ec +0xec 0x00 0x00 0x00 0x40 0x65 + +# 0x000007f2: +# CHECK: clgrj %r0, %r0, 5, 0x7f2 +0xec 0x00 0x00 0x00 0x50 0x65 + +# 0x000007f8: +# CHECK: clgrjlh %r0, %r0, 0x7f8 +0xec 0x00 0x00 0x00 0x60 0x65 + +# 0x000007fe: +# CHECK: clgrj %r0, %r0, 7, 0x7fe +0xec 0x00 0x00 0x00 0x70 0x65 + +# 0x00000804: +# CHECK: clgrje %r0, %r0, 0x804 +0xec 0x00 0x00 0x00 0x80 0x65 + +# 0x0000080a: +# CHECK: clgrj %r0, %r0, 9, 0x80a +0xec 0x00 0x00 0x00 0x90 0x65 + +# 0x00000810: +# CHECK: clgrjhe %r0, %r0, 0x810 +0xec 0x00 0x00 0x00 0xa0 0x65 + +# 0x00000816: +# CHECK: clgrj %r0, %r0, 11, 0x816 +0xec 0x00 0x00 0x00 0xb0 0x65 + +# 0x0000081c: +# CHECK: clgrjle %r0, %r0, 0x81c +0xec 0x00 0x00 0x00 0xc0 0x65 + +# 0x00000822: +# CHECK: clgrj %r0, %r0, 13, 0x822 +0xec 0x00 0x00 0x00 0xd0 0x65 + +# 0x00000828: +# CHECK: clgrj %r0, %r0, 14, 0x828 +0xec 0x00 0x00 0x00 0xe0 0x65 + +# 0x0000082e: +# CHECK: clgrj %r0, %r0, 15, 0x82e +0xec 0x00 0x00 0x00 0xf0 0x65 + +# 0x00000834: +# CHECK: clrj %r0, %r0, 0, 0x834 +0xec 0x00 0x00 0x00 0x00 0x77 + +# 0x0000083a: +# CHECK: clrj %r0, %r15, 0, 0x83a +0xec 0x0f 0x00 0x00 0x00 0x77 + +# 0x00000840: +# CHECK: clrj %r15, %r0, 0, 0x840 +0xec 0xf0 0x00 0x00 0x00 0x77 + +# 0x00000846: +# CHECK: clrj %r7, %r8, 0, 0x846 +0xec 0x78 0x00 0x00 0x00 0x77 + +# 0x0000084c: +# CHECK: clrj %r0, %r0, 0, 0x84a +0xec 0x00 0xff 0xff 0x00 0x77 + +# 0x00000852: +# CHECK: clrj %r0, %r0, 0, 0xffffffffffff0852 +0xec 0x00 0x80 0x00 0x00 0x77 + +# 0x00000858: +# CHECK: clrj %r0, %r0, 0, 0x10856 +0xec 0x00 0x7f 0xff 0x00 0x77 + +# 0x0000085e: +# CHECK: clrj %r0, %r0, 1, 0x85e +0xec 0x00 0x00 0x00 0x10 0x77 + +# 0x00000864: +# CHECK: clrjh %r0, %r0, 0x864 +0xec 0x00 0x00 0x00 0x20 0x77 + +# 0x0000086a: +# CHECK: clrj %r0, %r0, 3, 0x86a +0xec 0x00 0x00 0x00 0x30 0x77 + +# 0x00000870: +# CHECK: clrjl %r0, %r0, 0x870 +0xec 0x00 0x00 0x00 0x40 0x77 + +# 0x00000876: +# CHECK: clrj %r0, %r0, 5, 0x876 +0xec 0x00 0x00 0x00 0x50 0x77 + +# 0x0000087c: +# CHECK: clrjlh %r0, %r0, 0x87c +0xec 0x00 0x00 0x00 0x60 0x77 + +# 0x00000882: +# CHECK: clrj %r0, %r0, 7, 0x882 +0xec 0x00 0x00 0x00 0x70 0x77 + +# 0x00000888: +# CHECK: clrje %r0, %r0, 0x888 +0xec 0x00 0x00 0x00 0x80 0x77 + +# 0x0000088e: +# CHECK: clrj %r0, %r0, 9, 0x88e +0xec 0x00 0x00 0x00 0x90 0x77 + +# 0x00000894: +# CHECK: clrjhe %r0, %r0, 0x894 +0xec 0x00 0x00 0x00 0xa0 0x77 + +# 0x0000089a: +# CHECK: clrj %r0, %r0, 11, 0x89a +0xec 0x00 0x00 0x00 0xb0 0x77 + +# 0x000008a0: +# CHECK: clrjle %r0, %r0, 0x8a0 +0xec 0x00 0x00 0x00 0xc0 0x77 + +# 0x000008a6: +# CHECK: clrj %r0, %r0, 13, 0x8a6 +0xec 0x00 0x00 0x00 0xd0 0x77 + +# 0x000008ac: +# CHECK: clrj %r0, %r0, 14, 0x8ac +0xec 0x00 0x00 0x00 0xe0 0x77 + +# 0x000008b2: +# CHECK: clrj %r0, %r0, 15, 0x8b2 +0xec 0x00 0x00 0x00 0xf0 0x77 + +# 0x000008b8: +# CHECK: clgij %r0, 0, 0, 0x8b8 +0xec 0x00 0x00 0x00 0x00 0x7d + +# 0x000008be: +# CHECK: clgij %r0, 127, 0, 0x8be +0xec 0x00 0x00 0x00 0x7f 0x7d + +# 0x000008c4: +# CHECK: clgij %r0, 128, 0, 0x8c4 +0xec 0x00 0x00 0x00 0x80 0x7d + +# 0x000008ca: +# CHECK: clgij %r0, 255, 0, 0x8ca +0xec 0x00 0x00 0x00 0xff 0x7d + +# 0x000008d0: +# CHECK: clgij %r15, 0, 0, 0x8d0 +0xec 0xf0 0x00 0x00 0x00 0x7d + +# 0x000008d6: +# CHECK: clgij %r7, 100, 0, 0x8d6 +0xec 0x70 0x00 0x00 0x64 0x7d + +# 0x000008dc: +# CHECK: clgij %r0, 0, 0, 0x8da +0xec 0x00 0xff 0xff 0x00 0x7d + +# 0x000008e2: +# CHECK: clgij %r0, 0, 0, 0xffffffffffff08e2 +0xec 0x00 0x80 0x00 0x00 0x7d + +# 0x000008e8: +# CHECK: clgij %r0, 0, 0, 0x108e6 +0xec 0x00 0x7f 0xff 0x00 0x7d + +# 0x000008ee: +# CHECK: clgij %r0, 0, 1, 0x8ee +0xec 0x01 0x00 0x00 0x00 0x7d + +# 0x000008f4: +# CHECK: clgijh %r0, 0, 0x8f4 +0xec 0x02 0x00 0x00 0x00 0x7d + +# 0x000008fa: +# CHECK: clgij %r0, 0, 3, 0x8fa +0xec 0x03 0x00 0x00 0x00 0x7d + +# 0x00000900: +# CHECK: clgijl %r0, 0, 0x900 +0xec 0x04 0x00 0x00 0x00 0x7d + +# 0x00000906: +# CHECK: clgij %r0, 0, 5, 0x906 +0xec 0x05 0x00 0x00 0x00 0x7d + +# 0x0000090c: +# CHECK: clgijlh %r0, 0, 0x90c +0xec 0x06 0x00 0x00 0x00 0x7d + +# 0x00000912: +# CHECK: clgij %r0, 0, 7, 0x912 +0xec 0x07 0x00 0x00 0x00 0x7d + +# 0x00000918: +# CHECK: clgije %r0, 0, 0x918 +0xec 0x08 0x00 0x00 0x00 0x7d + +# 0x0000091e: +# CHECK: clgij %r0, 0, 9, 0x91e +0xec 0x09 0x00 0x00 0x00 0x7d + +# 0x00000924: +# CHECK: clgijhe %r0, 0, 0x924 +0xec 0x0a 0x00 0x00 0x00 0x7d + +# 0x0000092a: +# CHECK: clgij %r0, 0, 11, 0x92a +0xec 0x0b 0x00 0x00 0x00 0x7d + +# 0x00000930: +# CHECK: clgijle %r0, 0, 0x930 +0xec 0x0c 0x00 0x00 0x00 0x7d + +# 0x00000936: +# CHECK: clgij %r0, 0, 13, 0x936 +0xec 0x0d 0x00 0x00 0x00 0x7d + +# 0x0000093c: +# CHECK: clgij %r0, 0, 14, 0x93c +0xec 0x0e 0x00 0x00 0x00 0x7d + +# 0x00000942: +# CHECK: clgij %r0, 0, 15, 0x942 +0xec 0x0f 0x00 0x00 0x00 0x7d + +# 0x00000948: +# CHECK: clij %r0, 0, 0, 0x948 +0xec 0x00 0x00 0x00 0x00 0x7f + +# 0x0000094e: +# CHECK: clij %r0, 127, 0, 0x94e +0xec 0x00 0x00 0x00 0x7f 0x7f + +# 0x00000954: +# CHECK: clij %r0, 128, 0, 0x954 +0xec 0x00 0x00 0x00 0x80 0x7f + +# 0x0000095a: +# CHECK: clij %r0, 255, 0, 0x95a +0xec 0x00 0x00 0x00 0xff 0x7f + +# 0x00000960: +# CHECK: clij %r15, 0, 0, 0x960 +0xec 0xf0 0x00 0x00 0x00 0x7f + +# 0x00000966: +# CHECK: clij %r7, 100, 0, 0x966 +0xec 0x70 0x00 0x00 0x64 0x7f + +# 0x0000096c: +# CHECK: clij %r0, 0, 0, 0x96a +0xec 0x00 0xff 0xff 0x00 0x7f + +# 0x00000972: +# CHECK: clij %r0, 0, 0, 0xffffffffffff0972 +0xec 0x00 0x80 0x00 0x00 0x7f + +# 0x00000978: +# CHECK: clij %r0, 0, 0, 0x10976 +0xec 0x00 0x7f 0xff 0x00 0x7f + +# 0x0000097e: +# CHECK: clij %r0, 0, 1, 0x97e +0xec 0x01 0x00 0x00 0x00 0x7f + +# 0x00000984: +# CHECK: clijh %r0, 0, 0x984 +0xec 0x02 0x00 0x00 0x00 0x7f + +# 0x0000098a: +# CHECK: clij %r0, 0, 3, 0x98a +0xec 0x03 0x00 0x00 0x00 0x7f + +# 0x00000990: +# CHECK: clijl %r0, 0, 0x990 +0xec 0x04 0x00 0x00 0x00 0x7f + +# 0x00000996: +# CHECK: clij %r0, 0, 5, 0x996 +0xec 0x05 0x00 0x00 0x00 0x7f + +# 0x0000099c: +# CHECK: clijlh %r0, 0, 0x99c +0xec 0x06 0x00 0x00 0x00 0x7f + +# 0x000009a2: +# CHECK: clij %r0, 0, 7, 0x9a2 +0xec 0x07 0x00 0x00 0x00 0x7f + +# 0x000009a8: +# CHECK: clije %r0, 0, 0x9a8 +0xec 0x08 0x00 0x00 0x00 0x7f + +# 0x000009ae: +# CHECK: clij %r0, 0, 9, 0x9ae +0xec 0x09 0x00 0x00 0x00 0x7f + +# 0x000009b4: +# CHECK: clijhe %r0, 0, 0x9b4 +0xec 0x0a 0x00 0x00 0x00 0x7f + +# 0x000009ba: +# CHECK: clij %r0, 0, 11, 0x9ba +0xec 0x0b 0x00 0x00 0x00 0x7f + +# 0x000009c0: +# CHECK: clijle %r0, 0, 0x9c0 +0xec 0x0c 0x00 0x00 0x00 0x7f + +# 0x000009c6: +# CHECK: clij %r0, 0, 13, 0x9c6 +0xec 0x0d 0x00 0x00 0x00 0x7f + +# 0x000009cc: +# CHECK: clij %r0, 0, 14, 0x9cc +0xec 0x0e 0x00 0x00 0x00 0x7f + +# 0x000009d2: +# CHECK: clij %r0, 0, 15, 0x9d2 +0xec 0x0f 0x00 0x00 0x00 0x7f diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s index 923c6ac99a3..f7baeef98b2 100644 --- a/test/MC/SystemZ/insn-bad.s +++ b/test/MC/SystemZ/insn-bad.s @@ -850,6 +850,50 @@ clghsi 0, -1 clghsi 0, 65536 +#CHECK: error: invalid operand +#CHECK: clgij %r0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: clgij %r0, 256, 0, 0 + + clgij %r0, -1, 0, 0 + clgij %r0, 256, 0, 0 + +#CHECK: error: offset out of range +#CHECK: clgij %r0, 0, 0, -0x100002 +#CHECK: error: offset out of range +#CHECK: clgij %r0, 0, 0, -1 +#CHECK: error: offset out of range +#CHECK: clgij %r0, 0, 0, 1 +#CHECK: error: offset out of range +#CHECK: clgij %r0, 0, 0, 0x10000 + + clgij %r0, 0, 0, -0x100002 + clgij %r0, 0, 0, -1 + clgij %r0, 0, 0, 1 + clgij %r0, 0, 0, 0x10000 + +#CHECK: error: invalid instruction +#CHECK: clgijo %r0, 0, 0, 0 +#CHECK: error: invalid instruction +#CHECK: clgijno %r0, 0, 0, 0 + + clgijo %r0, 0, 0, 0 + clgijno %r0, 0, 0, 0 + +#CHECK: error: offset out of range +#CHECK: clgrj %r0, %r0, 0, -0x100002 +#CHECK: error: offset out of range +#CHECK: clgrj %r0, %r0, 0, -1 +#CHECK: error: offset out of range +#CHECK: clgrj %r0, %r0, 0, 1 +#CHECK: error: offset out of range +#CHECK: clgrj %r0, %r0, 0, 0x10000 + + clgrj %r0, %r0, 0, -0x100002 + clgrj %r0, %r0, 0, -1 + clgrj %r0, %r0, 0, 1 + clgrj %r0, %r0, 0, 0x10000 + #CHECK: error: offset out of range #CHECK: clgrl %r0, -0x1000000002 #CHECK: error: offset out of range @@ -913,6 +957,36 @@ cli 0, 256 #CHECK: error: invalid operand +#CHECK: clij %r0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: clij %r0, 256, 0, 0 + + clij %r0, -1, 0, 0 + clij %r0, 256, 0, 0 + +#CHECK: error: offset out of range +#CHECK: clij %r0, 0, 0, -0x100002 +#CHECK: error: offset out of range +#CHECK: clij %r0, 0, 0, -1 +#CHECK: error: offset out of range +#CHECK: clij %r0, 0, 0, 1 +#CHECK: error: offset out of range +#CHECK: clij %r0, 0, 0, 0x10000 + + clij %r0, 0, 0, -0x100002 + clij %r0, 0, 0, -1 + clij %r0, 0, 0, 1 + clij %r0, 0, 0, 0x10000 + +#CHECK: error: invalid instruction +#CHECK: clijo %r0, 0, 0, 0 +#CHECK: error: invalid instruction +#CHECK: clijno %r0, 0, 0, 0 + + clijo %r0, 0, 0, 0 + clijno %r0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: cliy -524289, 0 #CHECK: error: invalid operand #CHECK: cliy 524288, 0 @@ -930,6 +1004,28 @@ cliy 0, 256 #CHECK: error: offset out of range +#CHECK: clrj %r0, %r0, 0, -0x100002 +#CHECK: error: offset out of range +#CHECK: clrj %r0, %r0, 0, -1 +#CHECK: error: offset out of range +#CHECK: clrj %r0, %r0, 0, 1 +#CHECK: error: offset out of range +#CHECK: clrj %r0, %r0, 0, 0x10000 + + clrj %r0, %r0, 0, -0x100002 + clrj %r0, %r0, 0, -1 + clrj %r0, %r0, 0, 1 + clrj %r0, %r0, 0, 0x10000 + +#CHECK: error: invalid instruction +#CHECK: clrjo %r0, %r0, 0, 0 +#CHECK: error: invalid instruction +#CHECK: clrjno %r0, %r0, 0, 0 + + clrjo %r0, %r0, 0, 0 + clrjno %r0, %r0, 0, 0 + +#CHECK: error: offset out of range #CHECK: clrl %r0, -0x1000000002 #CHECK: error: offset out of range #CHECK: clrl %r0, -1 diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s index 52f23eb3fd5..20410505020 100644 --- a/test/MC/SystemZ/insn-good.s +++ b/test/MC/SystemZ/insn-good.s @@ -2656,6 +2656,233 @@ clghsi 4095(%r1), 42 clghsi 4095(%r15), 42 +#CHECK: clgij %r0, 0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x7d] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clgij %r0, 255, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0xff,0x7d] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clgij %r15, 0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x7d] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clgij %r0, 0, 0, 0 + clgij %r0, 255, 0, 0 + clgij %r15, 0, 0, 0 + +#CHECK: clgij %r1, 193, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, -0x10000 +#CHECK: clgij %r1, 193, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, -2 +#CHECK: clgij %r1, 193, 0, .[[LAB:L.*]] # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, 0 +#CHECK: clgij %r1, 193, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, 0xfffe + +#CHECK: clgij %r1, 193, 0, foo # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, foo + +#CHECK: clgij %r1, 193, 1, foo # encoding: [0xec,0x11,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 1, foo + +#CHECK: clgij %r1, 193, 2, foo # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijh %r1, 193, foo # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijnle %r1, 193, foo # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 2, foo + clgijh %r1, 193, foo + clgijnle %r1, 193, foo + +#CHECK: clgij %r1, 193, 3, foo # encoding: [0xec,0x13,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 3, foo + +#CHECK: clgij %r1, 193, 4, foo # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijl %r1, 193, foo # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijnhe %r1, 193, foo # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 4, foo + clgijl %r1, 193, foo + clgijnhe %r1, 193, foo + +#CHECK: clgij %r1, 193, 5, foo # encoding: [0xec,0x15,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 5, foo + +#CHECK: clgij %r1, 193, 6, foo # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijlh %r1, 193, foo # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijne %r1, 193, foo # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 6, foo + clgijlh %r1, 193, foo + clgijne %r1, 193, foo + +#CHECK: clgij %r1, 193, 7, foo # encoding: [0xec,0x17,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 7, foo + +#CHECK: clgij %r1, 193, 8, foo # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgije %r1, 193, foo # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijnlh %r1, 193, foo # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 8, foo + clgije %r1, 193, foo + clgijnlh %r1, 193, foo + +#CHECK: clgij %r1, 193, 9, foo # encoding: [0xec,0x19,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 9, foo + +#CHECK: clgij %r1, 193, 10, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijhe %r1, 193, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijnl %r1, 193, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 10, foo + clgijhe %r1, 193, foo + clgijnl %r1, 193, foo + +#CHECK: clgij %r1, 193, 11, foo # encoding: [0xec,0x1b,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 11, foo + +#CHECK: clgij %r1, 193, 12, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijle %r1, 193, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgijnh %r1, 193, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 12, foo + clgijle %r1, 193, foo + clgijnh %r1, 193, foo + +#CHECK: clgij %r1, 193, 13, foo # encoding: [0xec,0x1d,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 13, foo + +#CHECK: clgij %r1, 193, 14, foo # encoding: [0xec,0x1e,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 14, foo + +#CHECK: clgij %r1, 193, 15, foo # encoding: [0xec,0x1f,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgij %r1, 193, 15, foo + +#CHECK: clgij %r1, 193, 0, bar+100 # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, bar+100 + +#CHECK: clgijh %r1, 193, bar+100 # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijh %r1, 193, bar+100 + +#CHECK: clgijnle %r1, 193, bar+100 # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijnle %r1, 193, bar+100 + +#CHECK: clgijl %r1, 193, bar+100 # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijl %r1, 193, bar+100 + +#CHECK: clgijnhe %r1, 193, bar+100 # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijnhe %r1, 193, bar+100 + +#CHECK: clgijlh %r1, 193, bar+100 # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijlh %r1, 193, bar+100 + +#CHECK: clgijne %r1, 193, bar+100 # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijne %r1, 193, bar+100 + +#CHECK: clgije %r1, 193, bar+100 # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgije %r1, 193, bar+100 + +#CHECK: clgijnlh %r1, 193, bar+100 # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijnlh %r1, 193, bar+100 + +#CHECK: clgijhe %r1, 193, bar+100 # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijhe %r1, 193, bar+100 + +#CHECK: clgijnl %r1, 193, bar+100 # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijnl %r1, 193, bar+100 + +#CHECK: clgijle %r1, 193, bar+100 # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijle %r1, 193, bar+100 + +#CHECK: clgijnh %r1, 193, bar+100 # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgijnh %r1, 193, bar+100 + +#CHECK: clgij %r1, 193, 0, bar@PLT # encoding: [0xec,0x10,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgij %r1, 193, 0, bar@PLT + +#CHECK: clgijh %r1, 193, bar@PLT # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijh %r1, 193, bar@PLT + +#CHECK: clgijnle %r1, 193, bar@PLT # encoding: [0xec,0x12,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijnle %r1, 193, bar@PLT + +#CHECK: clgijl %r1, 193, bar@PLT # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijl %r1, 193, bar@PLT + +#CHECK: clgijnhe %r1, 193, bar@PLT # encoding: [0xec,0x14,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijnhe %r1, 193, bar@PLT + +#CHECK: clgijlh %r1, 193, bar@PLT # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijlh %r1, 193, bar@PLT + +#CHECK: clgijne %r1, 193, bar@PLT # encoding: [0xec,0x16,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijne %r1, 193, bar@PLT + +#CHECK: clgije %r1, 193, bar@PLT # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgije %r1, 193, bar@PLT + +#CHECK: clgijnlh %r1, 193, bar@PLT # encoding: [0xec,0x18,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijnlh %r1, 193, bar@PLT + +#CHECK: clgijhe %r1, 193, bar@PLT # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijhe %r1, 193, bar@PLT + +#CHECK: clgijnl %r1, 193, bar@PLT # encoding: [0xec,0x1a,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijnl %r1, 193, bar@PLT + +#CHECK: clgijle %r1, 193, bar@PLT # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijle %r1, 193, bar@PLT + +#CHECK: clgijnh %r1, 193, bar@PLT # encoding: [0xec,0x1c,A,A,0xc1,0x7d] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgijnh %r1, 193, bar@PLT + #CHECK: clgr %r0, %r0 # encoding: [0xb9,0x21,0x00,0x00] #CHECK: clgr %r0, %r15 # encoding: [0xb9,0x21,0x00,0x0f] #CHECK: clgr %r15, %r0 # encoding: [0xb9,0x21,0x00,0xf0] @@ -2666,6 +2893,236 @@ clgr %r15,%r0 clgr %r7,%r8 +#CHECK: clgrj %r0, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clgrj %r0, %r15, 0, .[[LAB:L.*]] # encoding: [0xec,0x0f,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clgrj %r15, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clgrj %r7, %r8, 0, .[[LAB:L.*]] # encoding: [0xec,0x78,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clgrj %r0,%r0,0,0 + clgrj %r0,%r15,0,0 + clgrj %r15,%r0,0,0 + clgrj %r7,%r8,0,0 + +#CHECK: clgrj %r1, %r2, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, -0x10000 +#CHECK: clgrj %r1, %r2, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, -2 +#CHECK: clgrj %r1, %r2, 0, .[[LAB:L.*]] # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, 0 +#CHECK: clgrj %r1, %r2, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, 0xfffe + +#CHECK: clgrj %r1, %r2, 0, foo # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, foo + +#CHECK: clgrj %r1, %r2, 1, foo # encoding: [0xec,0x12,A,A,0x10,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 1, foo + +#CHECK: clgrj %r1, %r2, 2, foo # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjnle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 2, foo + clgrjh %r1, %r2, foo + clgrjnle %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 3, foo # encoding: [0xec,0x12,A,A,0x30,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 3, foo + +#CHECK: clgrj %r1, %r2, 4, foo # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjnhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 4, foo + clgrjl %r1, %r2, foo + clgrjnhe %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 5, foo # encoding: [0xec,0x12,A,A,0x50,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 5, foo + +#CHECK: clgrj %r1, %r2, 6, foo # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjne %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 6, foo + clgrjlh %r1, %r2, foo + clgrjne %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 7, foo # encoding: [0xec,0x12,A,A,0x70,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 7, foo + +#CHECK: clgrj %r1, %r2, 8, foo # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrje %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjnlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 8, foo + clgrje %r1, %r2, foo + clgrjnlh %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 9, foo # encoding: [0xec,0x12,A,A,0x90,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 9, foo + +#CHECK: clgrj %r1, %r2, 10, foo # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjnl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 10, foo + clgrjhe %r1, %r2, foo + clgrjnl %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 11, foo # encoding: [0xec,0x12,A,A,0xb0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 11, foo + +#CHECK: clgrj %r1, %r2, 12, foo # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clgrjnh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 12, foo + clgrjle %r1, %r2, foo + clgrjnh %r1, %r2, foo + +#CHECK: clgrj %r1, %r2, 13, foo # encoding: [0xec,0x12,A,A,0xd0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 13, foo + +#CHECK: clgrj %r1, %r2, 14, foo # encoding: [0xec,0x12,A,A,0xe0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 14, foo + +#CHECK: clgrj %r1, %r2, 15, foo # encoding: [0xec,0x12,A,A,0xf0,0x65] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 15, foo + +#CHECK: clgrj %r1, %r2, 0, bar+100 # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, bar+100 + +#CHECK: clgrjh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjh %r1, %r2, bar+100 + +#CHECK: clgrjnle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjnle %r1, %r2, bar+100 + +#CHECK: clgrjl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjl %r1, %r2, bar+100 + +#CHECK: clgrjnhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjnhe %r1, %r2, bar+100 + +#CHECK: clgrjlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjlh %r1, %r2, bar+100 + +#CHECK: clgrjne %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjne %r1, %r2, bar+100 + +#CHECK: clgrje %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrje %r1, %r2, bar+100 + +#CHECK: clgrjnlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjnlh %r1, %r2, bar+100 + +#CHECK: clgrjhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjhe %r1, %r2, bar+100 + +#CHECK: clgrjnl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjnl %r1, %r2, bar+100 + +#CHECK: clgrjle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjle %r1, %r2, bar+100 + +#CHECK: clgrjnh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clgrjnh %r1, %r2, bar+100 + +#CHECK: clgrj %r1, %r2, 0, bar@PLT # encoding: [0xec,0x12,A,A,0x00,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrj %r1, %r2, 0, bar@PLT + +#CHECK: clgrjh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjh %r1, %r2, bar@PLT + +#CHECK: clgrjnle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjnle %r1, %r2, bar@PLT + +#CHECK: clgrjl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjl %r1, %r2, bar@PLT + +#CHECK: clgrjnhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjnhe %r1, %r2, bar@PLT + +#CHECK: clgrjlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjlh %r1, %r2, bar@PLT + +#CHECK: clgrjne %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjne %r1, %r2, bar@PLT + +#CHECK: clgrje %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrje %r1, %r2, bar@PLT + +#CHECK: clgrjnlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjnlh %r1, %r2, bar@PLT + +#CHECK: clgrjhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjhe %r1, %r2, bar@PLT + +#CHECK: clgrjnl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjnl %r1, %r2, bar@PLT + +#CHECK: clgrjle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjle %r1, %r2, bar@PLT + +#CHECK: clgrjnh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x65] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clgrjnh %r1, %r2, bar@PLT + #CHECK: clgrl %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x0a,A,A,A,A] #CHECK: fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL clgrl %r0, -0x100000000 @@ -2772,6 +3229,233 @@ cli 4095(%r1), 42 cli 4095(%r15), 42 +#CHECK: clij %r0, 0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x7f] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clij %r0, 255, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0xff,0x7f] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clij %r15, 0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x7f] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clij %r0, 0, 0, 0 + clij %r0, 255, 0, 0 + clij %r15, 0, 0, 0 + +#CHECK: clij %r1, 193, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, -0x10000 +#CHECK: clij %r1, 193, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, -2 +#CHECK: clij %r1, 193, 0, .[[LAB:L.*]] # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, 0 +#CHECK: clij %r1, 193, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, 0xfffe + +#CHECK: clij %r1, 193, 0, foo # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, foo + +#CHECK: clij %r1, 193, 1, foo # encoding: [0xec,0x11,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 1, foo + +#CHECK: clij %r1, 193, 2, foo # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijh %r1, 193, foo # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijnle %r1, 193, foo # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 2, foo + clijh %r1, 193, foo + clijnle %r1, 193, foo + +#CHECK: clij %r1, 193, 3, foo # encoding: [0xec,0x13,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 3, foo + +#CHECK: clij %r1, 193, 4, foo # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijl %r1, 193, foo # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijnhe %r1, 193, foo # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 4, foo + clijl %r1, 193, foo + clijnhe %r1, 193, foo + +#CHECK: clij %r1, 193, 5, foo # encoding: [0xec,0x15,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 5, foo + +#CHECK: clij %r1, 193, 6, foo # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijlh %r1, 193, foo # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijne %r1, 193, foo # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 6, foo + clijlh %r1, 193, foo + clijne %r1, 193, foo + +#CHECK: clij %r1, 193, 7, foo # encoding: [0xec,0x17,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 7, foo + +#CHECK: clij %r1, 193, 8, foo # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clije %r1, 193, foo # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijnlh %r1, 193, foo # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 8, foo + clije %r1, 193, foo + clijnlh %r1, 193, foo + +#CHECK: clij %r1, 193, 9, foo # encoding: [0xec,0x19,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 9, foo + +#CHECK: clij %r1, 193, 10, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijhe %r1, 193, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijnl %r1, 193, foo # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 10, foo + clijhe %r1, 193, foo + clijnl %r1, 193, foo + +#CHECK: clij %r1, 193, 11, foo # encoding: [0xec,0x1b,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 11, foo + +#CHECK: clij %r1, 193, 12, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijle %r1, 193, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clijnh %r1, 193, foo # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 12, foo + clijle %r1, 193, foo + clijnh %r1, 193, foo + +#CHECK: clij %r1, 193, 13, foo # encoding: [0xec,0x1d,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 13, foo + +#CHECK: clij %r1, 193, 14, foo # encoding: [0xec,0x1e,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 14, foo + +#CHECK: clij %r1, 193, 15, foo # encoding: [0xec,0x1f,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clij %r1, 193, 15, foo + +#CHECK: clij %r1, 193, 0, bar+100 # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, bar+100 + +#CHECK: clijh %r1, 193, bar+100 # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijh %r1, 193, bar+100 + +#CHECK: clijnle %r1, 193, bar+100 # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijnle %r1, 193, bar+100 + +#CHECK: clijl %r1, 193, bar+100 # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijl %r1, 193, bar+100 + +#CHECK: clijnhe %r1, 193, bar+100 # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijnhe %r1, 193, bar+100 + +#CHECK: clijlh %r1, 193, bar+100 # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijlh %r1, 193, bar+100 + +#CHECK: clijne %r1, 193, bar+100 # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijne %r1, 193, bar+100 + +#CHECK: clije %r1, 193, bar+100 # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clije %r1, 193, bar+100 + +#CHECK: clijnlh %r1, 193, bar+100 # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijnlh %r1, 193, bar+100 + +#CHECK: clijhe %r1, 193, bar+100 # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijhe %r1, 193, bar+100 + +#CHECK: clijnl %r1, 193, bar+100 # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijnl %r1, 193, bar+100 + +#CHECK: clijle %r1, 193, bar+100 # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijle %r1, 193, bar+100 + +#CHECK: clijnh %r1, 193, bar+100 # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clijnh %r1, 193, bar+100 + +#CHECK: clij %r1, 193, 0, bar@PLT # encoding: [0xec,0x10,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clij %r1, 193, 0, bar@PLT + +#CHECK: clijh %r1, 193, bar@PLT # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijh %r1, 193, bar@PLT + +#CHECK: clijnle %r1, 193, bar@PLT # encoding: [0xec,0x12,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijnle %r1, 193, bar@PLT + +#CHECK: clijl %r1, 193, bar@PLT # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijl %r1, 193, bar@PLT + +#CHECK: clijnhe %r1, 193, bar@PLT # encoding: [0xec,0x14,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijnhe %r1, 193, bar@PLT + +#CHECK: clijlh %r1, 193, bar@PLT # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijlh %r1, 193, bar@PLT + +#CHECK: clijne %r1, 193, bar@PLT # encoding: [0xec,0x16,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijne %r1, 193, bar@PLT + +#CHECK: clije %r1, 193, bar@PLT # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clije %r1, 193, bar@PLT + +#CHECK: clijnlh %r1, 193, bar@PLT # encoding: [0xec,0x18,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijnlh %r1, 193, bar@PLT + +#CHECK: clijhe %r1, 193, bar@PLT # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijhe %r1, 193, bar@PLT + +#CHECK: clijnl %r1, 193, bar@PLT # encoding: [0xec,0x1a,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijnl %r1, 193, bar@PLT + +#CHECK: clijle %r1, 193, bar@PLT # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijle %r1, 193, bar@PLT + +#CHECK: clijnh %r1, 193, bar@PLT # encoding: [0xec,0x1c,A,A,0xc1,0x7f] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clijnh %r1, 193, bar@PLT + #CHECK: cliy -524288, 0 # encoding: [0xeb,0x00,0x00,0x00,0x80,0x55] #CHECK: cliy -1, 0 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x55] #CHECK: cliy 0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0x55] @@ -2804,6 +3488,236 @@ clr %r15,%r0 clr %r7,%r8 +#CHECK: clrj %r0, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clrj %r0, %r15, 0, .[[LAB:L.*]] # encoding: [0xec,0x0f,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clrj %r15, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL +#CHECK: clrj %r7, %r8, 0, .[[LAB:L.*]] # encoding: [0xec,0x78,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clrj %r0,%r0,0,0 + clrj %r0,%r15,0,0 + clrj %r15,%r0,0,0 + clrj %r7,%r8,0,0 + +#CHECK: clrj %r1, %r2, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, -0x10000 +#CHECK: clrj %r1, %r2, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, -2 +#CHECK: clrj %r1, %r2, 0, .[[LAB:L.*]] # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, 0 +#CHECK: clrj %r1, %r2, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, 0xfffe + +#CHECK: clrj %r1, %r2, 0, foo # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, foo + +#CHECK: clrj %r1, %r2, 1, foo # encoding: [0xec,0x12,A,A,0x10,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 1, foo + +#CHECK: clrj %r1, %r2, 2, foo # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjnle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 2, foo + clrjh %r1, %r2, foo + clrjnle %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 3, foo # encoding: [0xec,0x12,A,A,0x30,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 3, foo + +#CHECK: clrj %r1, %r2, 4, foo # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjnhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 4, foo + clrjl %r1, %r2, foo + clrjnhe %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 5, foo # encoding: [0xec,0x12,A,A,0x50,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 5, foo + +#CHECK: clrj %r1, %r2, 6, foo # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjne %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 6, foo + clrjlh %r1, %r2, foo + clrjne %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 7, foo # encoding: [0xec,0x12,A,A,0x70,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 7, foo + +#CHECK: clrj %r1, %r2, 8, foo # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrje %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjnlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 8, foo + clrje %r1, %r2, foo + clrjnlh %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 9, foo # encoding: [0xec,0x12,A,A,0x90,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 9, foo + +#CHECK: clrj %r1, %r2, 10, foo # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjnl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 10, foo + clrjhe %r1, %r2, foo + clrjnl %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 11, foo # encoding: [0xec,0x12,A,A,0xb0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 11, foo + +#CHECK: clrj %r1, %r2, 12, foo # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL +#CHECK: clrjnh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 12, foo + clrjle %r1, %r2, foo + clrjnh %r1, %r2, foo + +#CHECK: clrj %r1, %r2, 13, foo # encoding: [0xec,0x12,A,A,0xd0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 13, foo + +#CHECK: clrj %r1, %r2, 14, foo # encoding: [0xec,0x12,A,A,0xe0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 14, foo + +#CHECK: clrj %r1, %r2, 15, foo # encoding: [0xec,0x12,A,A,0xf0,0x77] +#CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 15, foo + +#CHECK: clrj %r1, %r2, 0, bar+100 # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, bar+100 + +#CHECK: clrjh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjh %r1, %r2, bar+100 + +#CHECK: clrjnle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjnle %r1, %r2, bar+100 + +#CHECK: clrjl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjl %r1, %r2, bar+100 + +#CHECK: clrjnhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjnhe %r1, %r2, bar+100 + +#CHECK: clrjlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjlh %r1, %r2, bar+100 + +#CHECK: clrjne %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjne %r1, %r2, bar+100 + +#CHECK: clrje %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrje %r1, %r2, bar+100 + +#CHECK: clrjnlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjnlh %r1, %r2, bar+100 + +#CHECK: clrjhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjhe %r1, %r2, bar+100 + +#CHECK: clrjnl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjnl %r1, %r2, bar+100 + +#CHECK: clrjle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjle %r1, %r2, bar+100 + +#CHECK: clrjnh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL + clrjnh %r1, %r2, bar+100 + +#CHECK: clrj %r1, %r2, 0, bar@PLT # encoding: [0xec,0x12,A,A,0x00,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrj %r1, %r2, 0, bar@PLT + +#CHECK: clrjh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjh %r1, %r2, bar@PLT + +#CHECK: clrjnle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjnle %r1, %r2, bar@PLT + +#CHECK: clrjl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjl %r1, %r2, bar@PLT + +#CHECK: clrjnhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjnhe %r1, %r2, bar@PLT + +#CHECK: clrjlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjlh %r1, %r2, bar@PLT + +#CHECK: clrjne %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjne %r1, %r2, bar@PLT + +#CHECK: clrje %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrje %r1, %r2, bar@PLT + +#CHECK: clrjnlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjnlh %r1, %r2, bar@PLT + +#CHECK: clrjhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjhe %r1, %r2, bar@PLT + +#CHECK: clrjnl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjnl %r1, %r2, bar@PLT + +#CHECK: clrjle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjle %r1, %r2, bar@PLT + +#CHECK: clrjnh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x77] +#CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL + clrjnh %r1, %r2, bar@PLT + #CHECK: clrl %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x0f,A,A,A,A] #CHECK: fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL clrl %r0, -0x100000000 |