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| author | Sam Parker <sam.parker@arm.com> | 2017-09-18 14:46:14 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2017-09-18 14:46:14 +0000 |
| commit | df2a024df200fcc986d7f46adf57f2db7cff8bf7 (patch) | |
| tree | 8652a3c884c5c04ec28b8623e515bcee6de14bab | |
| parent | 5a79f317ae8318445d3cd4141e80dabf02c28f7d (diff) | |
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.
Differential Revision: https://reviews.llvm.org/D37974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313535 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/AArch64/AArch64.td | 2 | ||||
| -rw-r--r-- | test/MC/AArch64/armv8.1a-lse.s | 4 | ||||
| -rw-r--r-- | test/MC/AArch64/crc.s | 5 | ||||
| -rw-r--r-- | test/MC/AArch64/ras-extension.s | 2 |
4 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td index 8ff7f40ade4..8d2934ee8ab 100644 --- a/lib/Target/AArch64/AArch64.td +++ b/lib/Target/AArch64/AArch64.td @@ -215,6 +215,7 @@ def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53", def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55", "Cortex-A55 ARM processors", [ + HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureFuseAES, @@ -262,6 +263,7 @@ def ProcA73 : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73", def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75", "Cortex-A75 ARM processors", [ + HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureFuseAES, diff --git a/test/MC/AArch64/armv8.1a-lse.s b/test/MC/AArch64/armv8.1a-lse.s index 6143d0e1380..3da5e3c97b7 100644 --- a/test/MC/AArch64/armv8.1a-lse.s +++ b/test/MC/AArch64/armv8.1a-lse.s @@ -1,5 +1,9 @@ // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 -show-encoding < %s 2> %t | FileCheck %s +// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s +// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s .text cas w0, w1, [x2] diff --git a/test/MC/AArch64/crc.s b/test/MC/AArch64/crc.s index f0e4a5aa753..597ba3c257a 100644 --- a/test/MC/AArch64/crc.s +++ b/test/MC/AArch64/crc.s @@ -1,6 +1,11 @@ // RUN: llvm-mc -triple aarch64-- -mattr=+crc %s 2>&1 |\ // RUN: FileCheck %s --check-prefix=CRC +// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a55 %s 2>&1 |\ +// RUN: FileCheck %s --check-prefix=CRC +// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a75 %s 2>&1 |\ +// RUN: FileCheck %s --check-prefix=CRC + // RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\ // RUN: FileCheck %s --check-prefix=NOCRC // RUN: not llvm-mc -triple aarch64-- -mcpu=cyclone %s 2>&1 |\ diff --git a/test/MC/AArch64/ras-extension.s b/test/MC/AArch64/ras-extension.s index ac4a8099e35..e8d1f62e6bd 100644 --- a/test/MC/AArch64/ras-extension.s +++ b/test/MC/AArch64/ras-extension.s @@ -1,4 +1,6 @@ // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a55 < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a75 < %s | FileCheck %s esb // CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5] |