[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.

Summary:
Previously, we were inserting an InlineAsm statement for each line of the
inline assembly. This works for GAS but it triggers prologue/epilogue
emission when IAS is in use. This caused:
    .set noreorder
    .cpload $25
to be emitted as:
    .set push
    .set reorder
    .set noreorder
    .set pop
    .set push
    .set reorder
    .cpload $25
    .set pop
which led to assembler errors and caused the test to fail.

The whitespace-after-comma changes included in this patch are necessary to
match the output when IAS is in use.

Reviewers: vkalintiris

Subscribers: rkotler, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250895 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 236 insertions, 226 deletions

diff --git a/lib/Target/Mips/Mips16HardFloat.cpp b/lib/Target/Mips/Mips16HardFloat.cpp
index 6d34f4a1c5f..b2bc7e74c70 100644
--- a/lib/Target/Mips/Mips16HardFloat.cpp
+++ b/lib/Target/Mips/Mips16HardFloat.cpp
@@ -40,26 +40,17 @@ namespace {
     const MipsTargetMachine &TM;
   };
 
-  class InlineAsmHelper {
-    LLVMContext &C;
-    BasicBlock *BB;
-  public:
-    InlineAsmHelper(LLVMContext &C_, BasicBlock *BB_) :
-      C(C_), BB(BB_) {
-      }
-
-    void Out(StringRef AsmString) {
-      std::vector<llvm::Type *> AsmArgTypes;
-      std::vector<llvm::Value*> AsmArgs;
-
-      llvm::FunctionType *AsmFTy = llvm::FunctionType::get(Type::getVoidTy(C),
-                                                           AsmArgTypes, false);
-      llvm::InlineAsm *IA = llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
-                                                 /* IsAlignStack */ false,
-                                                 llvm::InlineAsm::AD_ATT);
-      CallInst::Create(IA, AsmArgs, "", BB);
-    }
-  };
+  static void EmitInlineAsm(LLVMContext &C, BasicBlock *BB, StringRef AsmText) {
+    std::vector<llvm::Type *> AsmArgTypes;
+    std::vector<llvm::Value *> AsmArgs;
+
+    llvm::FunctionType *AsmFTy =
+        llvm::FunctionType::get(Type::getVoidTy(C), AsmArgTypes, false);
+    llvm::InlineAsm *IA =
+        llvm::InlineAsm::get(AsmFTy, AsmText, "", true,
+                             /* IsAlignStack */ false, llvm::InlineAsm::AD_ATT);
+    CallInst::Create(IA, AsmArgs, "", BB);
+  }
 
   char Mips16HardFloat::ID = 0;
 }
@@ -195,63 +186,72 @@ static bool needsFPHelperFromSig(Function &F) {
 // We swap between FP and Integer registers to allow Mips16 and Mips32 to
 // interoperate
 //
-static void swapFPIntParams(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
-                            bool LE, bool ToFP) {
-  //LLVMContext &Context = M->getContext();
-  std::string MI = ToFP? "mtc1 ": "mfc1 ";
+static std::string swapFPIntParams(FPParamVariant PV, Module *M, bool LE,
+                                   bool ToFP) {
+  std::string MI = ToFP ? "mtc1 ": "mfc1 ";
+  std::string AsmText;
+
   switch (PV) {
   case FSig:
-    IAH.Out(MI + "$$4,$$f12");
+    AsmText += MI + "$$4, $$f12\n";
     break;
+
   case FFSig:
-    IAH.Out(MI +"$$4,$$f12");
-    IAH.Out(MI + "$$5,$$f14");
+    AsmText += MI + "$$4, $$f12\n";
+    AsmText += MI + "$$5, $$f14\n";
     break;
+
   case FDSig:
-    IAH.Out(MI + "$$4,$$f12");
+    AsmText += MI + "$$4, $$f12\n";
     if (LE) {
-      IAH.Out(MI + "$$6,$$f14");
-      IAH.Out(MI + "$$7,$$f15");
+      AsmText += MI + "$$6, $$f14\n";
+      AsmText += MI + "$$7, $$f15\n";
     } else {
-      IAH.Out(MI + "$$7,$$f14");
-      IAH.Out(MI + "$$6,$$f15");
+      AsmText += MI + "$$7, $$f14\n";
+      AsmText += MI + "$$6, $$f15\n";
     }
     break;
+
   case DSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
     }
     break;
+
   case DDSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
-      IAH.Out(MI + "$$6,$$f14");
-      IAH.Out(MI + "$$7,$$f15");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
+      AsmText += MI + "$$6, $$f14\n";
+      AsmText += MI + "$$7, $$f15\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
-      IAH.Out(MI + "$$7,$$f14");
-      IAH.Out(MI + "$$6,$$f15");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
+      AsmText += MI + "$$7, $$f14\n";
+      AsmText += MI + "$$6, $$f15\n";
     }
     break;
+
   case DFSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
     }
-    IAH.Out(MI + "$$6,$$f14");
+    AsmText += MI + "$$6, $$f14\n";
     break;
+
   case NoSig:
-    return;
+    break;
   }
+
+  return AsmText;
 }
 
 //
@@ -282,61 +282,70 @@ static void assureFPCallStub(Function &F, Module *M,
   FStub->addFnAttr("nomips16");
   FStub->setSection(SectionName);
   BasicBlock *BB = BasicBlock::Create(Context, "entry", FStub);
-  InlineAsmHelper IAH(Context, BB);
-  IAH.Out(".set reorder");
   FPReturnVariant RV = whichFPReturnVariant(FStub->getReturnType());
   FPParamVariant PV = whichFPParamVariantNeeded(F);
-  swapFPIntParams(PV, M, IAH, LE, true);
+
+  std::string AsmText;
+  AsmText += ".set reorder\n";
+  AsmText += swapFPIntParams(PV, M, LE, true);
   if (RV != NoFPRet) {
-    IAH.Out("move $$18, $$31");
-    IAH.Out("jal " + Name);
+    AsmText += "move $$18, $$31\n";
+    AsmText += "jal " + Name + "\n";
   } else {
-    IAH.Out("lui  $$25,%hi(" + Name + ")");
-    IAH.Out("addiu  $$25,$$25,%lo(" + Name + ")" );
+    AsmText += "lui  $$25, %hi(" + Name + ")\n";
+    AsmText += "addiu  $$25, $$25, %lo(" + Name + ")\n";
   }
+
   switch (RV) {
   case FRet:
-    IAH.Out("mfc1 $$2,$$f0");
+    AsmText += "mfc1 $$2, $$f0\n";
     break;
+
   case DRet:
     if (LE) {
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f1");
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f1\n";
     } else {
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$2,$$f1");
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$2, $$f1\n";
     }
     break;
+
   case CFRet:
     if (LE) {
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f2");
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f2\n";
     } else {
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$3,$$f2");
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$3, $$f2\n";
     }
     break;
+
   case CDRet:
     if (LE) {
-      IAH.Out("mfc1 $$4,$$f2");
-      IAH.Out("mfc1 $$5,$$f3");
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f1");
+      AsmText += "mfc1 $$4, $$f2\n";
+      AsmText += "mfc1 $$5, $$f3\n";
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f1\n";
 
     } else {
-      IAH.Out("mfc1 $$5,$$f2");
-      IAH.Out("mfc1 $$4,$$f3");
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$2,$$f1");
+      AsmText += "mfc1 $$5, $$f2\n";
+      AsmText += "mfc1 $$4, $$f3\n";
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$2, $$f1\n";
     }
     break;
+
   case NoFPRet:
     break;
   }
+
   if (RV != NoFPRet)
-    IAH.Out("jr $$18");
+    AsmText += "jr $$18\n";
   else
-    IAH.Out("jr $$25");
+    AsmText += "jr $$25\n";
+  EmitInlineAsm(Context, BB, AsmText);
+
   new UnreachableInst(Context, BB);
 }
 
@@ -469,20 +478,21 @@ static void createFPFnStub(Function *F, Module *M, FPParamVariant PV,
   FStub->addFnAttr("nomips16");
   FStub->setSection(SectionName);
   BasicBlock *BB = BasicBlock::Create(Context, "entry", FStub);
-  InlineAsmHelper IAH(Context, BB);
+
+  std::string AsmText;
   if (PicMode) {
-    IAH.Out(".set noreorder");
-    IAH.Out(".cpload  $$25");
-    IAH.Out(".set reorder");
-    IAH.Out(".reloc 0,R_MIPS_NONE," + Name);
-    IAH.Out("la $$25," + LocalName);
-  }
-  else {
-    IAH.Out("la $$25," + Name);
-  }
-  swapFPIntParams(PV, M, IAH, LE, false);
-  IAH.Out("jr $$25");
-  IAH.Out(LocalName + " = " + Name);
+    AsmText += ".set noreorder\n";
+    AsmText += ".cpload $$25\n";
+    AsmText += ".set reorder\n";
+    AsmText += ".reloc 0, R_MIPS_NONE, " + Name + "\n";
+    AsmText += "la $$25, " + LocalName + "\n";
+  } else
+    AsmText += "la $$25, " + Name + "\n";
+  AsmText += swapFPIntParams(PV, M, LE, false);
+  AsmText += "jr $$25\n";
+  AsmText += LocalName + " = " + Name + "\n";
+  EmitInlineAsm(Context, BB, AsmText);
+
   new UnreachableInst(FStub->getContext(), BB);
 }
 
diff --git a/test/CodeGen/Mips/hf16call32.ll b/test/CodeGen/Mips/hf16call32.ll
index 1a5736d48a8..018b524c3b5 100644
--- a/test/CodeGen/Mips/hf16call32.ll
+++ b/test/CodeGen/Mips/hf16call32.ll
@@ -753,9 +753,9 @@ land.end289:                                      ; preds = %land.rhs286, %land.
 declare void @v_sf(float) #1
 ; stel: .section .mips16.call.fp.v_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf
-; stel: mtc1 $4,$f12
-; stel: lui $25,%hi(v_sf)
-; stel: addiu $25,$25,%lo(v_sf)
+; stel: mtc1 $4, $f12
+; stel: lui $25, %hi(v_sf)
+; stel: addiu $25, $25, %lo(v_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf
 
@@ -766,54 +766,54 @@ declare void @v_df(double) #1
 ; stel: .ent __call_stub_fp_v_df
 ; stel: #APP
 ; setl: .set reorder
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: lui $25,%hi(v_df)
-; stel: addiu $25,$25,%lo(v_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: lui $25, %hi(v_df)
+; stel: addiu $25, $25, %lo(v_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df
 
 declare void @v_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.v_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
-; stel: lui $25,%hi(v_sf_sf)
-; stel: addiu $25,$25,%lo(v_sf_sf)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
+; stel: lui $25, %hi(v_sf_sf)
+; stel: addiu $25, $25, %lo(v_sf_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf_sf
 
 declare void @v_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.v_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
-; stel: lui $25,%hi(v_sf_df)
-; stel: addiu $25,$25,%lo(v_sf_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
+; stel: lui $25, %hi(v_sf_df)
+; stel: addiu $25, $25, %lo(v_sf_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf_df
 
 declare void @v_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.v_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: lui $25,%hi(v_df_sf)
-; stel: addiu $25,$25,%lo(v_df_sf)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: lui $25, %hi(v_df_sf)
+; stel: addiu $25, $25, %lo(v_df_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df_sf
 
 declare void @v_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.v_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
-; stel: lui $25,%hi(v_df_df)
-; stel: addiu $25,$25,%lo(v_df_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
+; stel: lui $25, %hi(v_df_df)
+; stel: addiu $25, $25, %lo(v_df_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df_df
 
@@ -822,76 +822,76 @@ declare float @sf_v() #1
 ; stel: .ent __call_stub_fp_sf_v
 ; stel: move $18, $31
 ; stel: jal sf_v
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_v
 
 declare float @sf_sf(float) #1
 ; stel: .section .mips16.call.fp.sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal sf_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf
 
 declare float @sf_df(double) #1
 ; stel: .section .mips16.call.fp.sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
 ; stel: move $18, $31
 ; stel: jal sf_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df
 
 declare float @sf_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.sf_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
 ; stel: move $18, $31
 ; stel: jal sf_sf_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf_sf
 
 declare float @sf_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.sf_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal sf_sf_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf_df
 
 declare float @sf_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.sf_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
 ; stel: move $18, $31
 ; stel: jal sf_df_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df_sf
 
 declare float @sf_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.sf_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal sf_df_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df_df
 
@@ -900,83 +900,83 @@ declare double @df_v() #1
 ; stel: .ent __call_stub_fp_df_v
 ; stel: move $18, $31
 ; stel: jal df_v
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_v
 
 declare double @df_sf(float) #1
 ; stel: .section .mips16.call.fp.df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal df_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf
 
 declare double @df_df(double) #1
 ; stel: .section .mips16.call.fp.df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
 ; stel: move $18, $31
 ; stel: jal df_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df
 
 declare double @df_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.df_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
 ; stel: move $18, $31
 ; stel: jal df_sf_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf_sf
 
 declare double @df_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.df_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal df_sf_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf_df
 
 declare double @df_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.df_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
 ; stel: move $18, $31
 ; stel: jal df_df_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df_sf
 
 declare double @df_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.df_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal df_df_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df_df
 
@@ -985,19 +985,19 @@ declare { float, float } @sc_v() #1
 ; stel: .ent __call_stub_fp_sc_v
 ; stel: move $18, $31
 ; stel: jal sc_v
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f2
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f2
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sc_v
 
 declare { float, float } @sc_sf(float) #1
 ; stel: .section .mips16.call.fp.sc_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sc_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal sc_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f2
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f2
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sc_sf
 
@@ -1006,23 +1006,23 @@ declare { double, double } @dc_v() #1
 ; stel: .ent __call_stub_fp_dc_v
 ; stel: move $18, $31
 ; stel: jal dc_v
-; stel: mfc1 $4,$f2
-; stel: mfc1 $5,$f3
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $4, $f2
+; stel: mfc1 $5, $f3
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_dc_v
 
 declare { double, double } @dc_sf(float) #1
 ; stel: .section .mips16.call.fp.dc_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_dc_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal dc_sf
-; stel: mfc1 $4,$f2
-; stel: mfc1 $5,$f3
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $4, $f2
+; stel: mfc1 $5, $f3
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_dc_sf
 
diff --git a/test/CodeGen/Mips/hf16call32_body.ll b/test/CodeGen/Mips/hf16call32_body.ll
index c42e7a2b461..1a04fd46f8b 100644
--- a/test/CodeGen/Mips/hf16call32_body.ll
+++ b/test/CodeGen/Mips/hf16call32_body.ll
@@ -20,8 +20,8 @@ entry:
 }
 ; stel: .section .mips16.fn.v_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf
-; stel: la $25,v_sf
-; stel: mfc1 $4,$f12
+; stel: la $25, v_sf
+; stel: mfc1 $4, $f12
 ; stel: jr $25
 ; stel: __fn_local_v_sf = v_sf
 ; stel: .end __fn_stub_v_sf
@@ -40,9 +40,9 @@ entry:
 
 ; stel: .section .mips16.fn.v_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_df
-; stel: la $25,v_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
+; stel: la $25, v_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
 ; stel: jr $25
 ; stel: __fn_local_v_df = v_df
 ; stel: .end __fn_stub_v_df
@@ -63,9 +63,9 @@ entry:
 
 ; stel: .section .mips16.fn.v_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_sf
-; stel: la $25,v_sf_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f14
+; stel: la $25, v_sf_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f14
 ; stel: jr $25
 ; stel: __fn_local_v_sf_sf = v_sf_sf
 ; stel: .end __fn_stub_v_sf_sf
@@ -86,10 +86,10 @@ entry:
 
 ; stel: .section .mips16.fn.v_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_df
-; stel: la $25,v_sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, v_sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_v_sf_df = v_sf_df
 ; stel: .end __fn_stub_v_sf_df
@@ -110,10 +110,10 @@ entry:
 
 ; stel: .section .mips16.fn.v_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_df_sf
-; stel: la $25,v_df_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
+; stel: la $25, v_df_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
 ; stel: jr $25
 ; stel: __fn_local_v_df_sf = v_df_sf
 ; stel: .end __fn_stub_v_df_sf
@@ -134,11 +134,11 @@ entry:
 
 ; stel: .section .mips16.fn.v_df_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_df_df
-; stel: la $25,v_df_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, v_df_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_v_df_df = v_df_df
 ; stel: .end __fn_stub_v_df_df
@@ -164,8 +164,8 @@ entry:
 
 ; stel: .section .mips16.fn.sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf
-; stel: la $25,sf_sf
-; stel: mfc1 $4,$f12
+; stel: la $25, sf_sf
+; stel: mfc1 $4, $f12
 ; stel: jr $25
 ; stel: __fn_local_sf_sf = sf_sf
 ; stel: .end __fn_stub_sf_sf
@@ -184,9 +184,9 @@ entry:
 
 ; stel: .section .mips16.fn.sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df
-; stel: la $25,sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
+; stel: la $25, sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
 ; stel: jr $25
 ; stel: __fn_local_sf_df = sf_df
 ; stel: .end __fn_stub_sf_df
@@ -208,9 +208,9 @@ entry:
 
 ; stel: .section .mips16.fn.sf_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_sf
-; stel: la $25,sf_sf_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f14
+; stel: la $25, sf_sf_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f14
 ; stel: jr $25
 ; stel: __fn_local_sf_sf_sf = sf_sf_sf
 ; stel: .end __fn_stub_sf_sf_sf
@@ -232,10 +232,10 @@ entry:
 
 ; stel: .section .mips16.fn.sf_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_df
-; stel: la $25,sf_sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, sf_sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_sf_sf_df = sf_sf_df
 ; stel: .end __fn_stub_sf_sf_df
@@ -257,10 +257,10 @@ entry:
 
 ; stel: .section .mips16.fn.sf_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df_sf
-; stel: la $25,sf_df_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
+; stel: la $25, sf_df_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
 ; stel: jr $25
 ; stel: __fn_local_sf_df_sf = sf_df_sf
 ; stel: .end __fn_stub_sf_df_sf
@@ -282,11 +282,11 @@ entry:
 
 ; stel: .section .mips16.fn.sf_df_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df_df
-; stel: la $25,sf_df_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, sf_df_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_sf_df_df = sf_df_df
 ; stel: .end __fn_stub_sf_df_df
diff --git a/test/CodeGen/Mips/hf1_body.ll b/test/CodeGen/Mips/hf1_body.ll
index 799df730f8c..adf45109d69 100644
--- a/test/CodeGen/Mips/hf1_body.ll
+++ b/test/CodeGen/Mips/hf1_body.ll
@@ -14,8 +14,8 @@ entry:
 ; picfp16: .ent __fn_stub_v_sf
 ; picfp16: .cpload $25
 ; picfp16: .set reorder
-; picfp16: .reloc 0,R_MIPS_NONE,v_sf
-; picfp16: la $25,$__fn_local_v_sf
-; picfp16: mfc1 $4,$f12
+; picfp16: .reloc 0, R_MIPS_NONE, v_sf
+; picfp16: la $25, $__fn_local_v_sf
+; picfp16: mfc1 $4, $f12
 ; picfp16: jr $25
 ; picfp16: .end __fn_stub_v_sf