diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2013-07-09 18:16:16 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-07-09 18:16:16 +0000 |
| commit | 033e0a94cbb3df8e0f48cebe0ac5b4a024c85b2d (patch) | |
| tree | f67b1c7b6ac89dab49f87d1a00121a79df5133c6 | |
| parent | ab6ceab8a65e26667a437a4ace7fe93a3772c6ff (diff) | |
Don't crash in SE dealing with ashr x, -1
ScalarEvolution::getSignedRange uses ComputeNumSignBits from ValueTracking on
ashr instructions. ComputeNumSignBits can return zero, but this case was not
handled correctly by the code in getSignedRange which was calling:
APInt::getSignedMinValue(BitWidth).ashr(NS - 1)
with NS = 0, resulting in an assertion failure in APInt::ashr.
Now, we just return the conservative result (as with NS == 1).
Another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185955 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Analysis/ScalarEvolution.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/ashr-neg1.ll | 18 |
2 files changed, 19 insertions, 1 deletions
diff --git a/lib/Analysis/ScalarEvolution.cpp b/lib/Analysis/ScalarEvolution.cpp index 0bff21e7c3e..af5051650ee 100644 --- a/lib/Analysis/ScalarEvolution.cpp +++ b/lib/Analysis/ScalarEvolution.cpp @@ -3589,7 +3589,7 @@ ScalarEvolution::getSignedRange(const SCEV *S) { if (!U->getValue()->getType()->isIntegerTy() && !TD) return setSignedRange(U, ConservativeResult); unsigned NS = ComputeNumSignBits(U->getValue(), TD); - if (NS == 1) + if (NS <= 1) return setSignedRange(U, ConservativeResult); return setSignedRange(U, ConservativeResult.intersectWith( ConstantRange(APInt::getSignedMinValue(BitWidth).ashr(NS - 1), diff --git a/test/CodeGen/PowerPC/ashr-neg1.ll b/test/CodeGen/PowerPC/ashr-neg1.ll new file mode 100644 index 00000000000..28e74f4d298 --- /dev/null +++ b/test/CodeGen/PowerPC/ashr-neg1.ll @@ -0,0 +1,18 @@ +; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s +target triple = "powerpc64-unknown-linux-gnu" + +define void @autogen_SD30723(i32) { +BB: + br label %CF80 + +CF80: ; preds = %CF80, %BB + %B = ashr i32 %0, -1 + br i1 undef, label %CF80, label %CF84 + +CF84: ; preds = %CF84, %CF80 + %Cmp62 = icmp sge i32 undef, %B + br i1 %Cmp62, label %CF84, label %CF85 + +CF85: ; preds = %CF85, %CF84 + br label %CF85 +} |