diff options
author | Craig Topper <craig.topper@intel.com> | 2018-07-28 19:44:20 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@intel.com> | 2018-07-28 19:44:20 +0000 |
commit | acb4985d700d18d0e0cb7d83e9df9d47726394bf (patch) | |
tree | d6aeda800aa1922ed1df952e8674df9142536f27 | |
parent | e192af49a170ac54aadc8cb75b9e88ac2d54e937 (diff) |
[SelectionDAG] Pass std::vector by reference instead of by pointer to BuildSDIV/BuildUDIV.
This removes the need for an assert to ensure the pointer isn't null.
Years ago we had ifs the checked the pointer was non-null before very access to the vector. These checks were removed and replaced with a single assert. But a reference seems more suitable here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338205 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/TargetLowering.h | 4 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 28 |
3 files changed, 16 insertions, 20 deletions
diff --git a/include/llvm/CodeGen/TargetLowering.h b/include/llvm/CodeGen/TargetLowering.h index 670ac003a19..68658907f03 100644 --- a/include/llvm/CodeGen/TargetLowering.h +++ b/include/llvm/CodeGen/TargetLowering.h @@ -3490,10 +3490,10 @@ public: // SDValue BuildSDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, bool IsAfterLegalization, - std::vector<SDNode *> *Created) const; + std::vector<SDNode *> &Created) const; SDValue BuildUDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, bool IsAfterLegalization, - std::vector<SDNode *> *Created) const; + std::vector<SDNode *> &Created) const; /// Targets may override this function to provide custom SDIV lowering for /// power-of-2 denominators. If the target returns an empty SDValue, LLVM diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 963081c2e95..689ff9eaed2 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -17921,7 +17921,7 @@ SDValue DAGCombiner::BuildSDIV(SDNode *N) { std::vector<SDNode *> Built; SDValue S = - TLI.BuildSDIV(N, C->getAPIntValue(), DAG, LegalOperations, &Built); + TLI.BuildSDIV(N, C->getAPIntValue(), DAG, LegalOperations, Built); for (SDNode *N : Built) AddToWorklist(N); @@ -17967,7 +17967,7 @@ SDValue DAGCombiner::BuildUDIV(SDNode *N) { std::vector<SDNode *> Built; SDValue S = - TLI.BuildUDIV(N, C->getAPIntValue(), DAG, LegalOperations, &Built); + TLI.BuildUDIV(N, C->getAPIntValue(), DAG, LegalOperations, Built); for (SDNode *N : Built) AddToWorklist(N); diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index fa867fcec36..559328bf9ad 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -3465,9 +3465,7 @@ SDValue TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, /// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide". SDValue TargetLowering::BuildSDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, bool IsAfterLegalization, - std::vector<SDNode *> *Created) const { - assert(Created && "No vector to hold sdiv ops."); - + std::vector<SDNode *> &Created) const { EVT VT = N->getValueType(0); SDLoc dl(N); @@ -3478,7 +3476,7 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, const APInt &Divisor, // If the sdiv has an 'exact' bit we can use a simpler lowering. if (N->getFlags().hasExact()) - return BuildExactSDIV(*this, N->getOperand(0), Divisor, dl, DAG, *Created); + return BuildExactSDIV(*this, N->getOperand(0), Divisor, dl, DAG, Created); APInt::ms magics = Divisor.magic(); @@ -3499,12 +3497,12 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, const APInt &Divisor, // If d > 0 and m < 0, add the numerator if (Divisor.isStrictlyPositive() && magics.m.isNegative()) { Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0)); - Created->push_back(Q.getNode()); + Created.push_back(Q.getNode()); } // If d < 0 and m > 0, subtract the numerator. if (Divisor.isNegative() && magics.m.isStrictlyPositive()) { Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0)); - Created->push_back(Q.getNode()); + Created.push_back(Q.getNode()); } auto &DL = DAG.getDataLayout(); // Shift right algebraic if shift value is nonzero @@ -3512,14 +3510,14 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, const APInt &Divisor, Q = DAG.getNode( ISD::SRA, dl, VT, Q, DAG.getConstant(magics.s, dl, getShiftAmountTy(Q.getValueType(), DL))); - Created->push_back(Q.getNode()); + Created.push_back(Q.getNode()); } // Extract the sign bit and add it to the quotient SDValue T = DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getScalarSizeInBits() - 1, dl, getShiftAmountTy(Q.getValueType(), DL))); - Created->push_back(T.getNode()); + Created.push_back(T.getNode()); return DAG.getNode(ISD::ADD, dl, VT, Q, T); } @@ -3529,9 +3527,7 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, const APInt &Divisor, /// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide". SDValue TargetLowering::BuildUDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, bool IsAfterLegalization, - std::vector<SDNode *> *Created) const { - assert(Created && "No vector to hold udiv ops."); - + std::vector<SDNode *> &Created) const { EVT VT = N->getValueType(0); SDLoc dl(N); auto &DL = DAG.getDataLayout(); @@ -3554,7 +3550,7 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, const APInt &Divisor, Q = DAG.getNode( ISD::SRL, dl, VT, Q, DAG.getConstant(Shift, dl, getShiftAmountTy(Q.getValueType(), DL))); - Created->push_back(Q.getNode()); + Created.push_back(Q.getNode()); // Get magic number for the shifted divisor. magics = Divisor.lshr(Shift).magicu(Shift); @@ -3573,7 +3569,7 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, const APInt &Divisor, else return SDValue(); // No mulhu or equivalent - Created->push_back(Q.getNode()); + Created.push_back(Q.getNode()); if (magics.a == 0) { assert(magics.s < Divisor.getBitWidth() && @@ -3583,13 +3579,13 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, const APInt &Divisor, DAG.getConstant(magics.s, dl, getShiftAmountTy(Q.getValueType(), DL))); } else { SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q); - Created->push_back(NPQ.getNode()); + Created.push_back(NPQ.getNode()); NPQ = DAG.getNode( ISD::SRL, dl, VT, NPQ, DAG.getConstant(1, dl, getShiftAmountTy(NPQ.getValueType(), DL))); - Created->push_back(NPQ.getNode()); + Created.push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q); - Created->push_back(NPQ.getNode()); + Created.push_back(NPQ.getNode()); return DAG.getNode( ISD::SRL, dl, VT, NPQ, DAG.getConstant(magics.s - 1, dl, |