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author | Hans Wennborg <hans@hanshq.net> | 2018-09-05 08:07:31 +0000 |
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committer | Hans Wennborg <hans@hanshq.net> | 2018-09-05 08:07:31 +0000 |
commit | 600f7a26262be299fe95cdf9bf4192669898c6bf (patch) | |
tree | a3926e0941c44116971de99a9f3c83f113f8d7ae | |
parent | 8111e8d5127bbd07dee4e43914bff34ab894b269 (diff) |
ReleaseNotes for PowerPC
Patch by Lei Huang!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_70@341453 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | docs/ReleaseNotes.rst | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index 5fd3c88afd1..7fe242c747c 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -230,7 +230,31 @@ During this release the MIPS target has: Changes to the PowerPC Target ----------------------------- - During this release ... +During this release the PowerPC target has: + +* Replaced the list scheduler for post register allocation with the machine scheduler. + +* Added support for coldcc calling convention. + +* Added support for ``symbol@high`` and ``symbol@higha`` symbol modifiers. + +* Added support for quad-precision floating point type (``__float128``) under the llvm option `-enable-ppc-quad-precision`. + +* Added dump function to ``LatencyPriorityQueue``. + +* Completed the Power9 scheduler model. + +* Optimized TLS code generation. + +* Improved MachineLICM for hoisting constant stores. + +* Improved code generation to reduce register use by using more register + immediate instructions. + +* Improved code generation to better exploit rotate-and-mask instructions. + +* Fixed the bug in dynamic loader for JIT which crashed NNVM. + +* Numerous bug fixes and code cleanups. Changes to the SystemZ Target ----------------------------- |