ampere-computing/linux.git - Linux kernel including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2018-01-07	riscv: rename SR_* constants to match the spec	Christoph Hellwig
2018-01-07	riscv: remove CONFIG_MMU ifdefs	Christoph Hellwig
2018-01-07	RISC-V: Make __NR_riscv_flush_icache visible to userspace	Palmer Dabbelt
2018-01-07	RISC-V: Add a basic defconfig	Karsten Merker
2017-12-11	RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code	Palmer Dabbelt
2017-12-11	RISC-V: Resurrect smp_mb__after_spinlock()	Palmer Dabbelt
2017-12-11	RISC-V: Logical vs Bitwise typo	Dan Carpenter
2017-12-05	bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program type	Hendrik Brueckner
2017-12-01	RISC-V: Fixes for clean allmodconfig build	Palmer Dabbelt
2017-12-01	RISC-V: __io_writes should respect the length argument	Palmer Dabbelt
2017-12-01	RISC-V: User-Visible Changes	Palmer Dabbelt
2017-12-01	RISC-V: __io_writes should respect the length argument	Palmer Dabbelt
2017-11-30	RISC-V: Clean up an unused include	Palmer Dabbelt
2017-11-30	RISC-V: Allow userspace to flush the instruction cache	Andrew Waterman
2017-11-30	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman
2017-11-30	RISC-V: Add missing include	Olof Johansson
2017-11-30	RISC-V: Use define for get_cycles like other architectures	Olof Johansson
2017-11-30	RISC-V: Provide stub of setup_profiling_timer()	Olof Johansson
2017-11-30	RISC-V: Export some expected symbols for modules	Olof Johansson
2017-11-30	RISC-V: move empty_zero_page definition to C and export it	Olof Johansson
2017-11-30	RISC-V: io.h: type fixes for warnings	Olof Johansson
2017-11-30	RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros	Olof Johansson
2017-11-30	RISC-V: use generic serial.h	Olof Johansson
2017-11-28	RISC-V: remove spin_unlock_wait()	Palmer Dabbelt
2017-11-28	RISC-V: `sfence.vma` orderes the instruction cache	Palmer Dabbelt
2017-11-28	RISC-V: Add READ_ONCE in arch_spin_is_locked()	Palmer Dabbelt
2017-11-28	RISC-V: __test_and_op_bit_ord should be strongly ordered	Palmer Dabbelt
2017-11-28	RISC-V: Remove smb_mb__{before,after}_spinlock()	Palmer Dabbelt
2017-11-28	RISC-V: Remove __smp_bp__{before,after}_atomic	Palmer Dabbelt
2017-11-28	RISC-V: Comment on why {,cmp}xchg is ordered how it is	Palmer Dabbelt
2017-11-28	RISC-V: Remove unused arguments from ATOMIC_OP	Palmer Dabbelt
2017-11-27	RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpu	Andrew Waterman
2017-11-27	RISC-V: Remove __vdso_cmpxchg{32,64} symbol versions	Palmer Dabbelt
2017-11-15	Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub...	Linus Torvalds
2017-09-26	RISC-V: Build Infrastructure	Palmer Dabbelt
2017-09-26	RISC-V: User-facing API	Palmer Dabbelt
2017-09-26	RISC-V: Paging and MMU	Palmer Dabbelt
2017-09-26	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt
2017-09-26	RISC-V: Task implementation	Palmer Dabbelt
2017-09-26	RISC-V: ELF and module implementation	Palmer Dabbelt
2017-09-26	RISC-V: Generic library routines and assembly	Palmer Dabbelt
2017-09-26	RISC-V: Atomic and Locking Code	Palmer Dabbelt
2017-09-26	RISC-V: Init and Halt Code	Palmer Dabbelt