diff options
| author | Iyappan Subramanian <isubramanian@apm.com> | 2016-09-22 15:47:33 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-09-23 08:38:38 -0400 |
| commit | e3978673f514fa4999f04dfad9bbd5bb70d0edc6 (patch) | |
| tree | 8e6fd48362d675bf8a2a23bf2167af36c859c14d /drivers/net/ethernet/apm/xgene/xgene_enet_main.h | |
| parent | e12934d9806e61d2727069cd56757987f3da76aa (diff) | |
drivers: net: xgene: Fix MSS programming
Current driver programs static value of MSS in hardware register for TSO
offload engine to segment the TCP payload regardless the MSS value
provided by network stack.
This patch fixes this by programming hardware registers with the
stack provided MSS value.
Since the hardware has the limitation of having only 4 MSS registers,
this patch uses reference count of mss values being used.
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: Toan Le <toanle@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/apm/xgene/xgene_enet_main.h')
| -rw-r--r-- | drivers/net/ethernet/apm/xgene/xgene_enet_main.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.h b/drivers/net/ethernet/apm/xgene/xgene_enet_main.h index 773537161171..0cda58f5a840 100644 --- a/drivers/net/ethernet/apm/xgene/xgene_enet_main.h +++ b/drivers/net/ethernet/apm/xgene/xgene_enet_main.h @@ -47,7 +47,7 @@ #define NUM_PKT_BUF 64 #define NUM_BUFPOOL 32 #define MAX_EXP_BUFFS 256 -#define XGENE_ENET_MSS 1448 +#define NUM_MSS_REG 4 #define XGENE_MIN_ENET_FRAME_SIZE 60 #define XGENE_MAX_ENET_IRQ 16 @@ -143,7 +143,7 @@ struct xgene_mac_ops { void (*rx_disable)(struct xgene_enet_pdata *pdata); void (*set_speed)(struct xgene_enet_pdata *pdata); void (*set_mac_addr)(struct xgene_enet_pdata *pdata); - void (*set_mss)(struct xgene_enet_pdata *pdata); + void (*set_mss)(struct xgene_enet_pdata *pdata, u16 mss, u8 index); void (*link_state)(struct work_struct *work); }; @@ -212,7 +212,9 @@ struct xgene_enet_pdata { u8 eth_bufnum; u8 bp_bufnum; u16 ring_num; - u32 mss; + u32 mss[NUM_MSS_REG]; + u32 mss_refcnt[NUM_MSS_REG]; + spinlock_t mss_lock; /* mss lock */ u8 tx_delay; u8 rx_delay; bool mdio_driver; |