diff options
| author | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-02-22 18:22:26 +0100 |
|---|---|---|
| committer | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-02-25 19:05:50 +0100 |
| commit | 62a90a2a28fe84b662ccbc26da110cfc09c82659 (patch) | |
| tree | cd3025e3729389317c55cd81e91ad90789f65e60 | |
| parent | 4ab6bd5cea513d88ded79d3d46220e06c4be3c10 (diff) | |
arm64: Add additional comment about the retpoline sequence.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
| -rw-r--r-- | arch/arm64/include/asm/nospec-branch.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/nospec-branch.h b/arch/arm64/include/asm/nospec-branch.h index 63db0e2b19a2..8a5d2c41da3b 100644 --- a/arch/arm64/include/asm/nospec-branch.h +++ b/arch/arm64/include/asm/nospec-branch.h @@ -8,6 +8,17 @@ #ifdef __ASSEMBLY__ +/* + * On certain processors the bl/ret sequence is a synchronization + * point for any pending speculation, and the value of all registers is + * known after this sequence. So the next flow of instructions, in particular + * any indirect branch, will be executed without any speculation. + * + * This property allows to create the retpoline-like code sequence below. + * Note, that this sequence does not jump to a provided target using the ret + * instruction, instead the ret instruction just goes on and + * the execution sequence continues on the same flow. + */ .macro retpoline alternative_if ARM64_RETPOLINE str x30, [sp, #-16]! |