summaryrefslogtreecommitdiff
path: root/gcc/doc/invoke.texi
diff options
context:
space:
mode:
authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2018-04-20 13:30:13 +0000
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2018-04-20 13:30:13 +0000
commitd59cfa9a4064339cf2bd2da828c4c133f13e57f0 (patch)
tree6cd51c6124f23a670b0018b401b7243b4b03f313 /gcc/doc/invoke.texi
parentfa95965babea86fbdcd6086aadd1986efa0a5818 (diff)
Define __CET__ for -fcf-protection and remove -mibt
With revision 259496: commit b1384095a7c1d06a44b70853372ebe037b2f7867 Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> Date: Thu Apr 19 15:15:04 2018 +0000 x86: Enable -fcf-protection with multi-byte NOPs -mibt does nothing and can be removed. Define __CET__ to indicate level protection with -fcf-protection: (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full gcc/ PR target/85469 * common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET): Removed. (OPTION_MASK_ISA_IBT_UNSET): Likewise. (ix86_handle_option): Don't handle OPT_mibt. * config/i386/cet.h: Check __CET__ instead of __IBT__ and __SHSTK__. * config/i386/driver-i386.c (host_detect_local_cpu): Remove has_ibt and ibt. * config/i386/i386-c.c (ix86_target_macros_internal): Don't check OPTION_MASK_ISA_IBT nor flag_cf_protection. (ix86_target_macros): Define __CET__ with flag_cf_protection for -fcf-protection. * config/i386/i386.c (isa2_opts): Remove -mibt. * config/i386/i386.h (TARGET_IBT): Removed. (TARGET_IBT_P): Likewise. (ix86_valid_target_attribute_inner_p): Don't check OPT_mibt. * config/i386/i386.md (nop_endbr): Don't check TARGET_IBT. * config/i386/i386.opt (mcet): Update help message. (mshstk): Likewise. (mibt): Removed. * doc/invoke.texi: Remove -mibt. Document __CET__. Document -mcet as an alias for -mshstk. gcc/testsuite/ PR target/85469 * gcc.target/i386/pr85044.c (dg-options): Remove -mibt. * gcc.target/i386/sse-26.c (dg-options): Remove -mno-ibt. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259522 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc/invoke.texi')
-rw-r--r--gcc/doc/invoke.texi28
1 files changed, 11 insertions, 17 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 0f2c83964f49..b6784b75fa22 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1261,7 +1261,7 @@ See RS/6000 and PowerPC Options.
-msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol
-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol
-mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes @gol
--mcet -mibt -mshstk -mforce-indirect-call -mavx512vbmi2 @gol
+-mcet -mshstk -mforce-indirect-call -mavx512vbmi2 @gol
-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol
-mms-bitfields -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
@@ -11829,6 +11829,11 @@ function. The value @code{full} is an alias for specifying both
@code{branch} and @code{return}. The value @code{none} turns off
instrumentation.
+The macro @code{__CET__} is defined when @option{-fcf-protection} is
+used. The first bit of @code{__CET__} is set to 1 for the value
+@code{branch} and the second bit of @code{__CET__} is set to 1 for
+the @code{return}.
+
You can also use the @code{nocf_check} attribute to identify
which functions and calls should be skipped from instrumentation
(@pxref{Function Attributes}).
@@ -27349,11 +27354,6 @@ supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without
these options.
-The @option{-mcet} option turns on the @option{-mibt} and @option{-mshstk}
-options. The compiler provides a number of built-in functions for
-fine-grained control in a CET-based application. See
-@xref{x86 Built-in Functions}, for more information.
-
@item -mdump-tune-features
@opindex mdump-tune-features
This option instructs GCC to dump the names of the x86 performance
@@ -27446,19 +27446,13 @@ see @ref{Other Builtins} for details.
This option enables use of the @code{movbe} instruction to implement
@code{__builtin_bswap32} and @code{__builtin_bswap64}.
-@item -mibt
-@opindex mibt
-This option enables indirect branch tracking built-in functions from
-x86 Control-flow Enforcement Technology (CET). The option
-@option{-mibt} is on by default when the @code{-mcet} option is
-specified.
-
@item -mshstk
+@itemx -mcet
@opindex mshstk
-This option enables shadow stack built-in functions from x86
-Control-flow Enforcement Technology (CET). The option
-@option{-mshstk} is on by default when the @option{-mcet} option is
-specified.
+@opindex mcet
+The @option{-mshstk} option enables shadow stack built-in functions
+from x86 Control-flow Enforcement Technology (CET). The @option{-mcet}
+option is an alias for the @option{-mshstk} option.
@item -mcrc32
@opindex mcrc32