summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChristoph Muellner <christoph.muellner@theobroma-systems.com>2018-05-31 00:07:45 +0200
committerChristoph Muellner <christoph.muellner@theobroma-systems.com>2018-05-31 00:12:25 +0200
commitecdb97168b5ba58d1335fd28e4aed2d6ef76d56f (patch)
tree021490787cd6c53f1f4d44b23d5417bc6d255d8e
parent16d3dddc0913148d8f7b3dc5b0d560934f853031 (diff)
aarch64: Fixing code style issues of retpoline changes.
This patch contains just whitespace changes. Most of this changes were made to address issues found by check_GNU_style.sh. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
-rw-r--r--gcc/config/aarch64/aarch64-opts.h2
-rw-r--r--gcc/config/aarch64/aarch64-protos.h4
-rw-r--r--gcc/config/aarch64/aarch64.c21
-rw-r--r--gcc/config/aarch64/aarch64.h2
-rw-r--r--gcc/config/aarch64/aarch64.opt2
-rw-r--r--gcc/doc/invoke.texi4
6 files changed, 18 insertions, 17 deletions
diff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h
index 14d9372e561e..4a01bcca3ecf 100644
--- a/gcc/config/aarch64/aarch64-opts.h
+++ b/gcc/config/aarch64/aarch64-opts.h
@@ -81,7 +81,7 @@ enum aarch64_function_type {
AARCH64_FUNCTION_ALL
};
-/* Values for -mindirect-branch option. */
+/* Values for -mindirect-branch option. */
enum indirect_branch {
indirect_branch_unset = 0,
indirect_branch_keep,
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 8fb61013ce90..c63cc19bf48c 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -332,11 +332,11 @@ bool aarch64_mov_operand_p (rtx, machine_mode);
int aarch64_simd_attr_length_rglist (enum machine_mode);
rtx aarch64_reverse_mask (enum machine_mode);
bool aarch64_offset_7bit_signed_scaled_p (machine_mode, HOST_WIDE_INT);
-const char *aarch64_output_branch_register (rtx);
-const char *aarch64_output_branch_and_link_register (rtx);
char *aarch64_output_scalar_simd_mov_immediate (rtx, machine_mode);
char *aarch64_output_simd_mov_immediate (rtx, machine_mode, unsigned);
bool aarch64_pad_arg_upward (machine_mode, const_tree);
+const char *aarch64_output_branch_register (rtx);
+const char *aarch64_output_branch_and_link_register (rtx);
bool aarch64_pad_reg_upward (machine_mode, const_tree, bool);
bool aarch64_regno_ok_for_base_p (int, bool);
bool aarch64_regno_ok_for_index_p (int, bool);
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 3a2c838a3ff0..17f2833abbad 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -9155,9 +9155,9 @@ aarch64_set_current_function (tree fndecl)
if (!fndecl || fndecl == aarch64_previous_fndecl)
{
if (fndecl != NULL_TREE)
- {
- aarch64_set_indirect_branch_type (fndecl);
- }
+ {
+ aarch64_set_indirect_branch_type (fndecl);
+ }
return;
}
@@ -9341,7 +9341,7 @@ aarch64_handle_fndecl_attribute (tree *node, tree name, tree args, int,
if (TREE_CODE (*node) != FUNCTION_DECL)
{
warning (OPT_Wattributes, "%qE attribute only applies to functions",
- name);
+ name);
*no_add_attrs = true;
}
@@ -12716,7 +12716,7 @@ static void
indirect_thunk_name (char name[32], int regno)
{
sprintf (name, "__aarch64_indirect_thunk_%s",
- reg_names[regno]);
+ reg_names[regno]);
}
/* Output a retpoline thunk for aarch64:
@@ -12780,7 +12780,7 @@ output_indirect_thunk (bool save_lr)
}
static void
-output_indirect_thunk_function(int regno)
+output_indirect_thunk_function (int regno)
{
char name[32];
tree decl;
@@ -12819,8 +12819,8 @@ output_indirect_thunk_function(int regno)
final_start_function (emit_barrier (), asm_out_file, 1);
output_indirect_thunk (true);
- rtx xop = gen_rtx_REG(word_mode, regno);
- output_asm_insn("br\t%0", &xop);
+ rtx xop = gen_rtx_REG (word_mode, regno);
+ output_asm_insn ("br\t%0", &xop);
final_end_function ();
init_insn_lengths ();
@@ -12903,7 +12903,7 @@ aarch64_code_end (void)
for (regno = R0_REGNUM; regno <= SP_REGNUM; regno++)
{
if (indirect_thunks_used & (1 << regno))
- output_indirect_thunk_function(regno);
+ output_indirect_thunk_function (regno);
}
}
@@ -15899,12 +15899,13 @@ aarch64_sched_can_speculate_insn (rtx_insn *insn)
}
/* Table of valid machine attributes. */
+
static const struct attribute_spec aarch64_attribute_table[] =
{
{ "indirect_branch", 1, 1, true, false, false,
aarch64_handle_fndecl_attribute, false },
/* End element. */
- { NULL, 0, 0, false, false, false, NULL, false }
+ { NULL, 0, 0, false, false, false, NULL, false }
};
/* Target-specific selftests. */
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index fc8250f9290e..b198014cfa01 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -603,7 +603,7 @@ typedef struct GTY (()) machine_function
bool reg_is_wrapped_separately[LAST_SAVED_REGNUM];
/* How to generate indirec branch. */
- ENUM_BITFIELD(indirect_branch) indirect_branch_type : 3;
+ ENUM_BITFIELD (indirect_branch) indirect_branch_type : 3;
} machine_function;
#endif
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index 65c6d03fb2bf..0ad449f8ad93 100644
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -191,7 +191,7 @@ Enables verbose cost model dumping in the debug dump files.
mindirect-branch=
Target Report RejectNegative Joined Enum(indirect_branch) Var(aarch64_indirect_branch) Init(indirect_branch_keep)
-Convert indirect branch-and-link and branch to branch-and-link and return thunks.
+Insert return thunk before br and blr.
Enum
Name(indirect_branch) Type(enum indirect_branch)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 629f2c5e530a..6c0f99ca7f30 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -14062,8 +14062,8 @@ instructions to a branch-and-link/branch to a function containing a retpoline
@samp{thunk-inline} similar to @samp{thunk}, but inlines the retpoline
before the branch-and-link-register/branch-register instruction.
@samp{thunk-extern} similar to @samp{thunk}, but does not insert the functions
-containing the retpoline. When using this option, these functions need to be
-provided in a separate object file. The retpoline functions exist for each
+containing the retpoline. When using this option, these functions need to be
+provided in a separate object file. The retpoline functions exist for each
register and are named __aarch64_indirect_thunk_xN (N being the register number).
You can control this behavior for a specific function by using the
function attribute @code{indirect_branch}. @xref{Function Attributes}.