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author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2014-02-12 09:49:50 +0100 |
---|---|---|
committer | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2018-04-27 10:16:38 +0200 |
commit | d0145f7336fe98a040938f89eb045115207ccd00 (patch) | |
tree | 1e0f486cc55376f63034d5d4e7ca839938f09291 | |
parent | 00ea0fbb71a348505b2ba0b9ba073962da5383d3 (diff) |
aarch64: Extend '*tb<optab><mode>1'.
The '*tb<optab><mode>1' can safely be extended to match operands of
any size, as long as the immediate operand (i.e. the bits tested)
match the size of the register operand.
This removes unnecessary zero-extension operations from the
generated instruction stream.
-rw-r--r-- | gcc/config/aarch64/aarch64.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 45c27cd84e9d..742d9d5b9b75 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -632,7 +632,7 @@ (define_insn "*tb<optab><mode>1" [(set (pc) (if_then_else - (EQL (zero_extract:DI (match_operand:GPI 0 "register_operand" "r") + (EQL (zero_extract:DI (match_operand:ALLI 0 "register_operand" "r") (const_int 1) (match_operand 1 "aarch64_simd_shift_imm_<mode>" "n")) |