diff options
| author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2018-05-11 13:29:41 +0000 |
|---|---|---|
| committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2018-05-11 13:29:41 +0000 |
| commit | e695d208e78264d3de8eb44f39fd84af461e9b31 (patch) | |
| tree | 0924ac02d8c48745b128fac0ba2b74b2ec730745 | |
| parent | c043705018de9754e996f27c152ea1c31b9618b9 (diff) | |
[arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities
My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit). The feature list defined was thus
missing the be8 bit. Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.
The fix is embarrassingly simple...
PR target/85733
* config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260162 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm-cpus.in | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index aa93ad8f9633..ae615068a73e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-05-11 Richard Earnshaw <rearnsha@arm.com> + + PR target/85733 + * config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature. + 2018-05-11 Sebastian Peryt <sebastian.peryt@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index fce30e41af08..96972a057e74 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -234,7 +234,7 @@ define fgroup ARMv6zk ARMv6k define fgroup ARMv6t2 ARMv6 thumb2 # This is suspect. ARMv6-m doesn't really pull in any useful features # from ARMv5* or ARMv6. -define fgroup ARMv6m mode32 armv3m armv4 thumb armv5 armv5e armv6 +define fgroup ARMv6m mode32 armv3m armv4 thumb armv5 armv5e armv6 be8 # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and # integer SIMD instructions that are in ARMv6T2. */ define fgroup ARMv7 ARMv6m thumb2 armv7 |