From 248e357f6941fe9409658386dc9b86b75dfd96c6 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Mon, 11 May 2020 15:18:47 +0100 Subject: aarch64: Fix ICE when expanding scalar floating move with -mgeneral-regs-only. [PR94991] In the testcase for PR94991, we are doing FAIL for scalar floating move expand pattern since TARGET_FLOAT is false with option -mgeneral-regs-only. But move expand pattern cannot fail. It would be better to replace the FAIL with code that bitcasts to the equivalent integer mode using gen_lowpart. 2020-05-11 Felix Yang gcc/ PR target/94991 * config/aarch64/aarch64.md (mov): Bitcasts to the equivalent integer mode using gen_lowpart instead of doing FAIL for scalar floating point move. gcc/testsuite/ PR target/94991 * gcc.target/aarch64/mgeneral-regs_5.c: New test. --- gcc/ChangeLog | 7 +++++++ gcc/config/aarch64/aarch64.md | 6 +++++- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/aarch64/mgeneral-regs_5.c | 14 ++++++++++++++ 4 files changed, 31 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/mgeneral-regs_5.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c4856f422a3..ae022d5cf52 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2020-05-11 Felix Yang + + PR target/94991 + * config/aarch64/aarch64.md (mov): + Bitcasts to the equivalent integer mode using gen_lowpart + instead of doing FAIL for scalar floating point move. + 2020-05-11 Alex Coplan * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index b2cfd015530..deca0004fed 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1364,7 +1364,11 @@ if (!TARGET_FLOAT) { aarch64_err_no_fpadvsimd (mode); - FAIL; + machine_mode intmode + = int_mode_for_size (GET_MODE_BITSIZE (mode), 0).require (); + emit_move_insn (gen_lowpart (intmode, operands[0]), + gen_lowpart (intmode, operands[1])); + DONE; } if (GET_CODE (operands[0]) == MEM diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ac40f2ef474..6484633738a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-05-11 Felix Yang + + PR target/94991 + * gcc.target/aarch64/mgeneral-regs_5.c: New test. + 2020-05-11 Alex Coplan * gcc.target/aarch64/csinv-neg.c: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_5.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_5.c new file mode 100644 index 00000000000..589509a7a88 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_5.c @@ -0,0 +1,14 @@ +/* { dg-options "-mgeneral-regs-only -O2" } */ + +struct S { float d; }; + +void bar (struct S); + +void +f0 (int x) +{ + struct S s = { .d = 0.0f }; /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of floating-point types" } */ + ((char *) &s.d)[0] = x; + s.d *= 7.0; /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of floating-point types" } */ + bar (s); /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of floating-point types" } */ +} -- cgit v1.2.3