summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2017-11-19 00:46:21 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-19 00:46:21 +0000
commitc04177df4d16e8efb33de7c31c2b53187e50a876 (patch)
treefe28c8b670b277b92805b925fcfd45654fddc079 /lib
parent8b13106061d170cc38d0f7e9d2cc7119858549e3 (diff)
[X86] Add cpu detection for cannonlake.
This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@318610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/builtins/cpu_model.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/builtins/cpu_model.c b/lib/builtins/cpu_model.c
index 2fd39e15a..4c96e9cd8 100644
--- a/lib/builtins/cpu_model.c
+++ b/lib/builtins/cpu_model.c
@@ -75,6 +75,7 @@ enum ProcessorSubtypes {
INTEL_COREI7_BROADWELL,
INTEL_COREI7_SKYLAKE,
INTEL_COREI7_SKYLAKE_AVX512,
+ INTEL_COREI7_CANNONLAKE,
CPU_SUBTYPE_MAX
};
@@ -340,6 +341,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512"
break;
+ // Cannonlake:
+ case 0x66:
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_CANNONLAKE; // "cannonlake"
+ break;
+
case 0x1c: // Most 45 nm Intel Atom processors
case 0x26: // 45 nm Atom Lincroft
case 0x27: // 32 nm Atom Medfield