diff options
author | Serge Rogatch <srogatch@accesssoftek.com> | 2017-01-17 11:53:38 +0000 |
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committer | Serge Rogatch <srogatch@accesssoftek.com> | 2017-01-17 11:53:38 +0000 |
commit | 962ff04019e1e7bca19d61a6b96478f8e86a7176 (patch) | |
tree | e7e4facde5c551b566a9c7e94c3abc9f7412e2e8 /lib/xray | |
parent | b0495c3d6140dd485b0d1ef21b44dc9f32b27a50 (diff) |
[XRay][Arm] Enable back XRay testing on Arm32 and fix the failing tests
Summary:
Testing of XRay was occasionally disabled on 32-bit Arm targets (someone assumed that XRay was supported on 64-bit targets only). This patch should fix that problem. Also here the instruction&data cache incoherency problem is fixed, because it may be causing a test to fail.
This patch is one of a series: see also
- https://reviews.llvm.org/D28624
Reviewers: dberris, rengolin
Reviewed By: rengolin
Subscribers: llvm-commits, aemerson, rengolin, dberris, iid_iunknown
Differential Revision: https://reviews.llvm.org/D28623
git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@292211 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/xray')
-rw-r--r-- | lib/xray/xray_arm.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/xray/xray_arm.cc b/lib/xray/xray_arm.cc index d89322e83..f5e2cd2a9 100644 --- a/lib/xray/xray_arm.cc +++ b/lib/xray/xray_arm.cc @@ -19,6 +19,8 @@ #include <atomic> #include <cassert> +extern "C" void __clear_cache(void* start, void* end); + namespace __xray { uint64_t cycleFrequency() XRAY_NEVER_INSTRUMENT { @@ -116,8 +118,8 @@ inline static bool patchSled(const bool Enable, const uint32_t FuncId, // B #20 uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.Address); + uint32_t *CurAddress = FirstAddress + 1; if (Enable) { - uint32_t *CurAddress = FirstAddress + 1; CurAddress = Write32bitLoadR0(CurAddress, reinterpret_cast<uint32_t>(FuncId)); CurAddress = @@ -125,6 +127,7 @@ inline static bool patchSled(const bool Enable, const uint32_t FuncId, *CurAddress = uint32_t(PatchOpcodes::PO_BlxIp); CurAddress++; *CurAddress = uint32_t(PatchOpcodes::PO_PopR0Lr); + CurAddress++; std::atomic_store_explicit( reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress), uint32_t(PatchOpcodes::PO_PushR0Lr), std::memory_order_release); @@ -133,6 +136,8 @@ inline static bool patchSled(const bool Enable, const uint32_t FuncId, reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress), uint32_t(PatchOpcodes::PO_B20), std::memory_order_release); } + __clear_cache(reinterpret_cast<char*>(FirstAddress), + reinterpret_cast<char*>(CurAddress)); return true; } |