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| author | Weiming Zhao <weimingz@codeaurora.org> | 2017-01-27 01:21:00 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2017-01-27 01:21:00 +0000 |
| commit | 164a6f2dc1023111b14c93c1036a9d3c5a55c16b (patch) | |
| tree | ec25b69f11ee23dadd92c9fc1bfd7e1cc0e66393 /lib/builtins/arm/aeabi_cfcmp.S | |
| parent | 0e474360af3bb5dbefd93c45a8d16d9db4260048 (diff) | |
[Builtin][ARM] Add Thumb1 support for aeabi_c{f,d}cmp.S and dcmp.S
Reviewers: compnerd, rengolin
Reviewed By: rengolin
Subscribers: aemerson, llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D28985
git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@293247 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/builtins/arm/aeabi_cfcmp.S')
| -rw-r--r-- | lib/builtins/arm/aeabi_cfcmp.S | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/lib/builtins/arm/aeabi_cfcmp.S b/lib/builtins/arm/aeabi_cfcmp.S index 274baf7ae..e37aa3d06 100644 --- a/lib/builtins/arm/aeabi_cfcmp.S +++ b/lib/builtins/arm/aeabi_cfcmp.S @@ -30,6 +30,19 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) push {r0-r3, lr} bl __aeabi_cfcmpeq_check_nan cmp r0, #1 +#if __ARM_ARCH_ISA_THUMB == 1 + beq 1f + // NaN has been ruled out, so __aeabi_cfcmple can't trap + mov r0, sp + ldm r0, {r0-r3} + bl __aeabi_cfcmple + pop {r0-r3, pc} +1: + // Z = 0, C = 1 + movs r0, #0xF + lsls r0, r0, #31 + pop {r0-r3, pc} +#else pop {r0-r3, lr} // NaN has been ruled out, so __aeabi_cfcmple can't trap @@ -37,6 +50,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) msr CPSR_f, #APSR_C JMP(lr) +#endif END_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) @@ -59,6 +73,28 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmple) bl __aeabi_fcmplt cmp r0, #1 +#if __ARM_ARCH_ISA_THUMB == 1 + bne 1f + // Z = 0, C = 0 + movs r0, #1 + lsls r0, r0, #1 + pop {r0-r3, pc} +1: + mov r0, sp + ldm r0, {r0-r3} + bl __aeabi_fcmpeq + cmp r0, #1 + bne 2f + // Z = 1, C = 1 + movs r0, #2 + lsls r0, r0, #31 + pop {r0-r3, pc} +2: + // Z = 0, C = 1 + movs r0, #0xF + lsls r0, r0, #31 + pop {r0-r3, pc} +#else moveq ip, #0 beq 1f @@ -72,6 +108,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmple) msr CPSR_f, ip pop {r0-r3} POP_PC() +#endif END_COMPILERRT_FUNCTION(__aeabi_cfcmple) // int __aeabi_cfrcmple(float a, float b) { |