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authorShiva Chen <shiva0217@gmail.com>2018-03-01 07:47:27 +0000
committerShiva Chen <shiva0217@gmail.com>2018-03-01 07:47:27 +0000
commit9008dc9a4e6c3ac1eb7cdd910c8f74099420d911 (patch)
tree5eb0a76d95b65e0798648433450985adee989136
parentcb51fdb0ad4f3c34c5a7212a1b93163a7489fb76 (diff)
[PATCH] [compiler-rt, RISCV] Support builtins for RISC-V
Summary: Support builtins for RISC-V, RV32 and RV64. Reviewers: asb, apazos, mgrang Differential Revision: https://reviews.llvm.org/D42958 git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@326420 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--cmake/Modules/CompilerRTUtils.cmake9
-rw-r--r--cmake/base-config-ix.cmake4
-rw-r--r--cmake/builtin-config-ix.cmake4
-rw-r--r--cmake/config-ix.cmake2
-rw-r--r--lib/builtins/CMakeLists.txt6
-rw-r--r--lib/builtins/int_types.h2
-rw-r--r--lib/builtins/riscv/mulsi3.S28
-rw-r--r--test/builtins/CMakeLists.txt5
-rw-r--r--test/builtins/Unit/riscv/mulsi3_test.c119
9 files changed, 177 insertions, 2 deletions
diff --git a/cmake/Modules/CompilerRTUtils.cmake b/cmake/Modules/CompilerRTUtils.cmake
index 9f79a9b92..f567202fa 100644
--- a/cmake/Modules/CompilerRTUtils.cmake
+++ b/cmake/Modules/CompilerRTUtils.cmake
@@ -168,6 +168,7 @@ macro(detect_target_arch)
check_symbol_exists(__mips64__ "" __MIPS64)
check_symbol_exists(__powerpc64__ "" __PPC64)
check_symbol_exists(__powerpc64le__ "" __PPC64LE)
+ check_symbol_exists(__riscv "" __RISCV)
check_symbol_exists(__s390x__ "" __S390X)
check_symbol_exists(__wasm32__ "" __WEBASSEMBLY32)
check_symbol_exists(__wasm64__ "" __WEBASSEMBLY64)
@@ -187,6 +188,14 @@ macro(detect_target_arch)
add_default_target_arch(powerpc64)
elseif(__PPC64LE)
add_default_target_arch(powerpc64le)
+ elseif(__RISCV)
+ if(CMAKE_SIZEOF_VOID_P EQUAL "4")
+ add_default_target_arch(riscv32)
+ elseif(CMAKE_SIZEOF_VOID_P EQUAL "8")
+ add_default_target_arch(riscv64)
+ else()
+ message(FATAL_ERROR "Unsupport XLEN for RISC-V")
+ endif()
elseif(__S390X)
add_default_target_arch(s390x)
elseif(__WEBASSEMBLY32)
diff --git a/cmake/base-config-ix.cmake b/cmake/base-config-ix.cmake
index b208f0852..beb05f6c8 100644
--- a/cmake/base-config-ix.cmake
+++ b/cmake/base-config-ix.cmake
@@ -186,6 +186,10 @@ macro(test_targets)
test_target_arch(aarch32 "" "-march=armv8-a")
elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "aarch64")
test_target_arch(aarch64 "" "-march=armv8-a")
+ elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "riscv32")
+ test_target_arch(riscv32 "" "")
+ elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "riscv64")
+ test_target_arch(riscv64 "" "")
elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "wasm32")
test_target_arch(wasm32 "" "--target=wasm32-unknown-unknown")
elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "wasm64")
diff --git a/cmake/builtin-config-ix.cmake b/cmake/builtin-config-ix.cmake
index bdb2529b5..eda5f4641 100644
--- a/cmake/builtin-config-ix.cmake
+++ b/cmake/builtin-config-ix.cmake
@@ -30,6 +30,8 @@ set(X86_64 x86_64)
set(MIPS32 mips mipsel)
set(MIPS64 mips64 mips64el)
set(PPC64 powerpc64 powerpc64le)
+set(RISCV32 riscv32)
+set(RISCV64 riscv64)
set(WASM32 wasm32)
set(WASM64 wasm64)
@@ -40,7 +42,7 @@ if(APPLE)
endif()
set(ALL_BUILTIN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64}
- ${MIPS32} ${MIPS64} ${PPC64} ${WASM32} ${WASM64})
+ ${MIPS32} ${MIPS64} ${PPC64} ${RISCV32} ${RISCV64} ${WASM32} ${WASM64})
include(CompilerRTUtils)
include(CompilerRTDarwinUtils)
diff --git a/cmake/config-ix.cmake b/cmake/config-ix.cmake
index 9f24b9d50..1e04da7bb 100644
--- a/cmake/config-ix.cmake
+++ b/cmake/config-ix.cmake
@@ -179,6 +179,8 @@ set(X86_64 x86_64)
set(MIPS32 mips mipsel)
set(MIPS64 mips64 mips64el)
set(PPC64 powerpc64 powerpc64le)
+set(RISCV32 riscv32)
+set(RISCV64 riscv64)
set(S390X s390x)
set(WASM32 wasm32)
set(WASM64 wasm64)
diff --git a/lib/builtins/CMakeLists.txt b/lib/builtins/CMakeLists.txt
index 13158b903..6c48a404a 100644
--- a/lib/builtins/CMakeLists.txt
+++ b/lib/builtins/CMakeLists.txt
@@ -480,6 +480,12 @@ set(powerpc64_SOURCES
${GENERIC_SOURCES})
set(powerpc64le_SOURCES ${powerpc64_SOURCES})
+set(riscv_SOURCES ${GENERIC_SOURCES} ${GENERIC_TF_SOURCES})
+set(riscv32_SOURCES
+ riscv/mulsi3.S
+ ${riscv_SOURCES})
+set(riscv64_SOURCES ${riscv_SOURCES})
+
set(wasm32_SOURCES
${GENERIC_TF_SOURCES}
${GENERIC_SOURCES})
diff --git a/lib/builtins/int_types.h b/lib/builtins/int_types.h
index a92238c5b..f53f343d3 100644
--- a/lib/builtins/int_types.h
+++ b/lib/builtins/int_types.h
@@ -60,7 +60,7 @@ typedef union
}s;
} udwords;
-#if (defined(__LP64__) || defined(__wasm__) || defined(__mips64))
+#if (defined(__LP64__) || defined(__wasm__) || defined(__mips64)) || defined(__riscv)
#define CRT_HAS_128BIT
#endif
diff --git a/lib/builtins/riscv/mulsi3.S b/lib/builtins/riscv/mulsi3.S
new file mode 100644
index 000000000..a58d23704
--- /dev/null
+++ b/lib/builtins/riscv/mulsi3.S
@@ -0,0 +1,28 @@
+//===--- mulsi3.S - Integer multiplication routines routines ---===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#if !defined(__riscv_mul) && __riscv_xlen == 32
+ .text
+ .align 2
+
+ .globl __mulsi3
+ .type __mulsi3, @function
+__mulsi3:
+ mv a2, a0
+ mv a0, zero
+.L1:
+ andi a3, a1, 1
+ beqz a3, .L2
+ add a0, a0, a2
+.L2:
+ srli a1, a1, 1
+ slli a2, a2, 1
+ bnez a1, .L1
+ ret
+#endif
diff --git a/test/builtins/CMakeLists.txt b/test/builtins/CMakeLists.txt
index cabf76722..a9199ebf1 100644
--- a/test/builtins/CMakeLists.txt
+++ b/test/builtins/CMakeLists.txt
@@ -26,6 +26,11 @@ foreach(arch ${BUILTIN_SUPPORTED_ARCH})
string(REPLACE ";" " " BUILTINS_TEST_TARGET_CFLAGS "${BUILTINS_TEST_TARGET_CFLAGS}")
endif()
+ if (${arch} STREQUAL "riscv32")
+ list(APPEND BUILTINS_TEST_TARGET_CFLAGS -fforce-enable-int128)
+ string(REPLACE ";" " " BUILTINS_TEST_TARGET_CFLAGS "${BUILTINS_TEST_TARGET_CFLAGS}")
+ endif()
+
string(TOUPPER ${arch} ARCH_UPPER_CASE)
set(CONFIG_NAME ${ARCH_UPPER_CASE}${OS_NAME}Config)
configure_lit_site_cfg(
diff --git a/test/builtins/Unit/riscv/mulsi3_test.c b/test/builtins/Unit/riscv/mulsi3_test.c
new file mode 100644
index 000000000..9033004f1
--- /dev/null
+++ b/test/builtins/Unit/riscv/mulsi3_test.c
@@ -0,0 +1,119 @@
+// REQUIRES-ANY: riscv32-target-arch
+// RUN: %clang_builtins %s %librt -o %t && %run %t
+//===-- mulsi3_test.c - Test __mulsi3 -------------------------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file tests __mulsi3 for the compiler_rt library.
+//
+//===----------------------------------------------------------------------===//
+
+#include "int_lib.h"
+#include <stdio.h>
+#include <limits.h>
+
+#if !defined(__riscv_mul) && __riscv_xlen == 32
+// Based on mulsi3_test.c
+
+COMPILER_RT_ABI si_int __mulsi3(si_int a, si_int b);
+
+int test__mulsi3(si_int a, si_int b, si_int expected)
+{
+ si_int x = __mulsi3(a, b);
+ if (x != expected)
+ printf("error in __mulsi3: %d * %d = %d, expected %d\n",
+ a, b, __mulsi3(a, b), expected);
+ return x != expected;
+}
+#endif
+
+int main()
+{
+#if !defined(__riscv_mul) && __riscv_xlen == 32
+ if (test__mulsi3(0, 0, 0))
+ return 1;
+ if (test__mulsi3(0, 1, 0))
+ return 1;
+ if (test__mulsi3(1, 0, 0))
+ return 1;
+ if (test__mulsi3(0, 10, 0))
+ return 1;
+ if (test__mulsi3(10, 0, 0))
+ return 1;
+ if (test__mulsi3(0, INT_MAX, 0))
+ return 1;
+ if (test__mulsi3(INT_MAX, 0, 0))
+ return 1;
+
+ if (test__mulsi3(0, -1, 0))
+ return 1;
+ if (test__mulsi3(-1, 0, 0))
+ return 1;
+ if (test__mulsi3(0, -10, 0))
+ return 1;
+ if (test__mulsi3(-10, 0, 0))
+ return 1;
+ if (test__mulsi3(0, INT_MIN, 0))
+ return 1;
+ if (test__mulsi3(INT_MIN, 0, 0))
+ return 1;
+
+ if (test__mulsi3(1, 1, 1))
+ return 1;
+ if (test__mulsi3(1, 10, 10))
+ return 1;
+ if (test__mulsi3(10, 1, 10))
+ return 1;
+ if (test__mulsi3(1, INT_MAX, INT_MAX))
+ return 1;
+ if (test__mulsi3(INT_MAX, 1, INT_MAX))
+ return 1;
+
+ if (test__mulsi3(1, -1, -1))
+ return 1;
+ if (test__mulsi3(1, -10, -10))
+ return 1;
+ if (test__mulsi3(-10, 1, -10))
+ return 1;
+ if (test__mulsi3(1, INT_MIN, INT_MIN))
+ return 1;
+ if (test__mulsi3(INT_MIN, 1, INT_MIN))
+ return 1;
+
+ if (test__mulsi3(46340, 46340, 2147395600))
+ return 1;
+ if (test__mulsi3(-46340, 46340, -2147395600))
+ return 1;
+ if (test__mulsi3(46340, -46340, -2147395600))
+ return 1;
+ if (test__mulsi3(-46340, -46340, 2147395600))
+ return 1;
+
+ if (test__mulsi3(4194303, 8192, 34359730176))
+ return 1;
+ if (test__mulsi3(-4194303, 8192, -34359730176))
+ return 1;
+ if (test__mulsi3(4194303, -8192, -34359730176))
+ return 1;
+ if (test__mulsi3(-4194303, -8192, 34359730176))
+ return 1;
+
+ if (test__mulsi3(8192, 4194303, 34359730176))
+ return 1;
+ if (test__mulsi3(-8192, 4194303, -34359730176))
+ return 1;
+ if (test__mulsi3(8192, -4194303, -34359730176))
+ return 1;
+ if (test__mulsi3(-8192, -4194303, 34359730176))
+ return 1;
+#else
+ printf("skipped\n");
+#endif
+
+ return 0;
+}