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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-08 17:25:48 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-08 17:25:48 +0000 |
| commit | e4bab2fcf1487f7895a1ea10e0b0d33283f49e77 (patch) | |
| tree | 15e10523428633ef890a06e337fef117020941c3 /test/Preprocessor/predefined-arch-macros.c | |
| parent | 2b3fd86894804c1f921e7156b2cc767affa57468 (diff) | |
[X86][LWP] Add __LWP__ macro tests
Missed in rL302418
Differential Revision: https://reviews.llvm.org/D32770
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Preprocessor/predefined-arch-macros.c')
| -rw-r--r-- | test/Preprocessor/predefined-arch-macros.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c index a0eb8cbcca..08f4d2573f 100644 --- a/test/Preprocessor/predefined-arch-macros.c +++ b/test/Preprocessor/predefined-arch-macros.c @@ -1601,6 +1601,7 @@ // CHECK_BDVER1_M32: #define __AES__ 1 // CHECK_BDVER1_M32: #define __AVX__ 1 // CHECK_BDVER1_M32: #define __FMA4__ 1 +// CHECK_BDVER1_M32: #define __LWP__ 1 // CHECK_BDVER1_M32: #define __LZCNT__ 1 // CHECK_BDVER1_M32: #define __MMX__ 1 // CHECK_BDVER1_M32: #define __PCLMUL__ 1 @@ -1630,6 +1631,7 @@ // CHECK_BDVER1_M64: #define __AES__ 1 // CHECK_BDVER1_M64: #define __AVX__ 1 // CHECK_BDVER1_M64: #define __FMA4__ 1 +// CHECK_BDVER1_M64: #define __LWP__ 1 // CHECK_BDVER1_M64: #define __LZCNT__ 1 // CHECK_BDVER1_M64: #define __MMX__ 1 // CHECK_BDVER1_M64: #define __PCLMUL__ 1 @@ -1664,6 +1666,7 @@ // CHECK_BDVER2_M32: #define __F16C__ 1 // CHECK_BDVER2_M32: #define __FMA4__ 1 // CHECK_BDVER2_M32: #define __FMA__ 1 +// CHECK_BDVER2_M32: #define __LWP__ 1 // CHECK_BDVER2_M32: #define __LZCNT__ 1 // CHECK_BDVER2_M32: #define __MMX__ 1 // CHECK_BDVER2_M32: #define __PCLMUL__ 1 @@ -1697,6 +1700,7 @@ // CHECK_BDVER2_M64: #define __F16C__ 1 // CHECK_BDVER2_M64: #define __FMA4__ 1 // CHECK_BDVER2_M64: #define __FMA__ 1 +// CHECK_BDVER2_M64: #define __LWP__ 1 // CHECK_BDVER2_M64: #define __LZCNT__ 1 // CHECK_BDVER2_M64: #define __MMX__ 1 // CHECK_BDVER2_M64: #define __PCLMUL__ 1 @@ -1733,6 +1737,7 @@ // CHECK_BDVER3_M32: #define __FMA4__ 1 // CHECK_BDVER3_M32: #define __FMA__ 1 // CHECK_BDVER3_M32: #define __FSGSBASE__ 1 +// CHECK_BDVER3_M32: #define __LWP__ 1 // CHECK_BDVER3_M32: #define __LZCNT__ 1 // CHECK_BDVER3_M32: #define __MMX__ 1 // CHECK_BDVER3_M32: #define __PCLMUL__ 1 @@ -1768,6 +1773,7 @@ // CHECK_BDVER3_M64: #define __FMA4__ 1 // CHECK_BDVER3_M64: #define __FMA__ 1 // CHECK_BDVER3_M64: #define __FSGSBASE__ 1 +// CHECK_BDVER3_M64: #define __LWP__ 1 // CHECK_BDVER3_M64: #define __LZCNT__ 1 // CHECK_BDVER3_M64: #define __MMX__ 1 // CHECK_BDVER3_M64: #define __PCLMUL__ 1 @@ -1807,6 +1813,7 @@ // CHECK_BDVER4_M32: #define __FMA4__ 1 // CHECK_BDVER4_M32: #define __FMA__ 1 // CHECK_BDVER4_M32: #define __FSGSBASE__ 1 +// CHECK_BDVER4_M32: #define __LWP__ 1 // CHECK_BDVER4_M32: #define __LZCNT__ 1 // CHECK_BDVER4_M32: #define __MMX__ 1 // CHECK_BDVER4_M32: #define __PCLMUL__ 1 @@ -1843,6 +1850,7 @@ // CHECK_BDVER4_M64: #define __FMA4__ 1 // CHECK_BDVER4_M64: #define __FMA__ 1 // CHECK_BDVER4_M64: #define __FSGSBASE__ 1 +// CHECK_BDVER4_M64: #define __LWP__ 1 // CHECK_BDVER4_M64: #define __LZCNT__ 1 // CHECK_BDVER4_M64: #define __MMX__ 1 // CHECK_BDVER4_M64: #define __PCLMUL__ 1 |