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authorHans Wennborg <hans@hanshq.net>2018-02-21 11:14:24 +0000
committerHans Wennborg <hans@hanshq.net>2018-02-21 11:14:24 +0000
commit36040b6238195161579408da4ba4dd0c344f6607 (patch)
treec7dd125572ea5d2aa31241cf0685ac0cb236f2e7
parentae798ac3057a9d268293fb509131f414d579a111 (diff)
Merging r325655:
------------------------------------------------------------------------ r325655 | ctopper | 2018-02-21 01:16:50 +0100 (Wed, 21 Feb 2018) | 8 lines [X86] Disable CLWB in Cannon Lake Cannon Lake does not support CLWB, therefore it does not include all features listed under SKX. Patch by Gabor Buella Differential Revision: https://reviews.llvm.org/D43459 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_60@325672 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Basic/Targets/X86.cpp3
-rw-r--r--test/Preprocessor/predefined-arch-macros.c4
2 files changed, 4 insertions, 3 deletions
diff --git a/lib/Basic/Targets/X86.cpp b/lib/Basic/Targets/X86.cpp
index 58c6ddc8ff..cfa6c571d6 100644
--- a/lib/Basic/Targets/X86.cpp
+++ b/lib/Basic/Targets/X86.cpp
@@ -152,7 +152,8 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "avx512bw", true);
setFeatureEnabledImpl(Features, "avx512vl", true);
setFeatureEnabledImpl(Features, "pku", true);
- setFeatureEnabledImpl(Features, "clwb", true);
+ if (Kind != CK_Cannonlake) // CNL inherits all SKX features, except CLWB
+ setFeatureEnabledImpl(Features, "clwb", true);
LLVM_FALLTHROUGH;
case CK_SkylakeClient:
setFeatureEnabledImpl(Features, "xsavec", true);
diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c
index 6021f9c60e..716d6f72ba 100644
--- a/test/Preprocessor/predefined-arch-macros.c
+++ b/test/Preprocessor/predefined-arch-macros.c
@@ -972,7 +972,7 @@
// CHECK_CNL_M32: #define __BMI2__ 1
// CHECK_CNL_M32: #define __BMI__ 1
// CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M32: #define __CLWB__ 1
+// CHECK_CNL_M32-NOT: #define __CLWB__ 1
// CHECK_CNL_M32: #define __F16C__ 1
// CHECK_CNL_M32: #define __FMA__ 1
// CHECK_CNL_M32: #define __LZCNT__ 1
@@ -1019,7 +1019,7 @@
// CHECK_CNL_M64: #define __BMI2__ 1
// CHECK_CNL_M64: #define __BMI__ 1
// CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M64: #define __CLWB__ 1
+// CHECK_CNL_M64-NOT: #define __CLWB__ 1
// CHECK_CNL_M64: #define __F16C__ 1
// CHECK_CNL_M64: #define __FMA__ 1
// CHECK_CNL_M64: #define __LZCNT__ 1