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AgeCommit message (Expand)Author
2016-01-05sim: msp430: switch to common disassembler tracingMike Frysinger
2016-01-05sim: trace: add support for disassemblingMike Frysinger
2016-01-05Add myself as the maintainer for the AArch64.Nick Clifton
2016-01-05Fix the execution of the MSP430 simulator testsuite.Nick Clifton
2016-01-04sim: use STATE_MAGIC helperMike Frysinger
2016-01-04sim: unify min/max macrosMike Frysinger
2016-01-04sim: aarch64: drop syscall.h include to fix buildTristan Gingold
2016-01-04sim: parse_args: polish getopt error messageMike Frysinger
2016-01-04sim: punt x86-specific bswap logicMike Frysinger
2016-01-04sim: d10v: gut endian logicMike Frysinger
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger
2016-01-03sim: TODO: move to wikiMike Frysinger
2016-01-03sim: clean up some more device detritusMike Frysinger
2016-01-03sim: use libiberty countargv in more placesMike Frysinger
2016-01-03sim: nrun: use lbasenameMike Frysinger
2016-01-03sim: drop host endian configure optionMike Frysinger
2016-01-03sim: convert to bfd_endianMike Frysinger
2016-01-02sim: cris: use standard output helpersMike Frysinger
2016-01-02sim: iq2000/m32r/lm32/sh64: delete dead option codeMike Frysinger
2016-01-02sim: delete dead current_state globalsMike Frysinger
2016-01-02sim: ppc: do not exit when parsing args w/gdbMike Frysinger
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker
2015-12-30sim: m68hc11: fix default endianMike Frysinger
2015-12-30sim: cris/m68hc11: move default endian/alignment to configureMike Frysinger
2015-12-30sim: h8300: inline sim_state_initializeMike Frysinger
2015-12-30sim: h8300: simplify h8300_reg_{fetch,store} funcsMike Frysinger
2015-12-30sim: h8300: switch to common sim-resumeMike Frysinger
2015-12-30sim: h8300: move default endian/alignment to configureMike Frysinger
2015-12-30sim: simplify STATE_MY_NAME setupMike Frysinger
2015-12-30sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to...Mike Frysinger
2015-12-30sim: h8300: move unused/buggy lregs arrayMike Frysinger
2015-12-30sim: h8300: drop unused inst.hMike Frysinger
2015-12-29sim: ppc: track closed state of file descriptors 0, 1, and 2.Kevin Buettner
2015-12-27sim: aarch64/msp430: fix disassembler usageMike Frysinger
2015-12-27sim: unify sim-hloadMike Frysinger
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger
2015-12-26sim: bfin: push down mmr address/size checksMike Frysinger
2015-12-26sim: bfin: avoid stack error under asanMike Frysinger
2015-12-26sim: sim-core: pass down cpu to hw accesses when availableMike Frysinger
2015-12-26sim: mips: delete mmu stubs to move to common sim_{read,write}Mike Frysinger
2015-12-26sim: cris: do not pass cpu when writing memory during initMike Frysinger
2015-12-26sim: standardize sim_create_inferior handling of argv a bit moreMike Frysinger
2015-12-26sim: aarch64: move ChangeLog contentMike Frysinger
2015-12-25sim: frv: punt WITH_DEVICE supportMike Frysinger
2015-12-25sim: m32r: migrate from WITH_DEVICES to WITH_HWMike Frysinger
2015-12-25sim: cris: migrate from WITH_DEVICES to WITH_HWMike Frysinger
2015-12-25sim: cris: clean up rvdummy a bitMike Frysinger
2015-12-25sim: cris: set up sane default path to rvdummyMike Frysinger
2015-12-25sim: hw-properties: delete trace callsMike Frysinger
2015-12-25sim: drop WITH_ENGINE defineMike Frysinger
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