MIPS: Add Global INValidate ASE support

Add support for the Global INValidate Application Specific Extension
for Release 6 of the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 187-191

bfd/
	* elfxx-mips.c (print_mips_ases): Add GINV extension.

binutils/
	* readelf.c (print_mips_ases): Add GINV extension.

gas/
	* NEWS: Mention MIPS Global INValidate ASE support.
	* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
	(md_longopts): Likewise.
	(mips_ases): Define availability for GINV.
	(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
	(md_show_usage): Add help for -mginv and -mno-ginv.
	* doc/as.texinfo: Document -mginv, -mno-ginv.
	* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
	.set noginv.
	* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
	ASE.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/ase-errors-1.l: Likewise.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ginv.d: New test.
	* testsuite/gas/mips/ginv-err.d: New test.
	* testsuite/gas/mips/ginv-err.l: New test stderr output.
	* testsuite/gas/mips/ginv.s: New test source.
	* testsuite/gas/mips/ginv-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
	* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
	(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
	* opcode/mips.h: Document "+\" operand format.
	(ASE_GINV): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
	mips64r6 descriptors.
	(parse_mips_ase_option): Handle -Mginv option.
	(print_mips_disassembler_options): Document -Mginv.
	* mips-opc.c (decode_mips_operand) <+\>: New operand format.
	(GINV): New macro.
	(mips_opcodes): Define ginvi and ginvt.

15 files changed, 125 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9caa8095b0..eeb41150cb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,26 @@
+2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
+
+	* NEWS: Mention MIPS Global INValidate ASE support.
+	* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
+	(md_longopts): Likewise.
+	(mips_ases): Define availability for GINV.
+	(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
+	(md_show_usage): Add help for -mginv and -mno-ginv.
+	* doc/as.texinfo: Document -mginv, -mno-ginv.
+	* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
+	.set noginv.
+	* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
+	ASE.
+	* testsuite/gas/mips/ase-errors-2.s: Likewise.
+	* testsuite/gas/mips/ase-errors-1.l: Likewise.
+	* testsuite/gas/mips/ase-errors-2.l: Likewise.
+	* testsuite/gas/mips/ginv.d: New test.
+	* testsuite/gas/mips/ginv-err.d: New test.
+	* testsuite/gas/mips/ginv-err.l: New test stderr output.
+	* testsuite/gas/mips/ginv.s: New test source.
+	* testsuite/gas/mips/ginv-err.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 	    Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 	    Maciej W. Rozycki  <macro@mips.com>
diff --git a/gas/NEWS b/gas/NEWS
index a50e264d6b..9dfc8450bc 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for the MIPS Global INValidate (GINV) ASE.
+
 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 
 * Add support for the Freescale S12Z architecture.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 7cadbb64ed..8dfc1f52be 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1527,6 +1527,8 @@ enum options
     OPTION_NAN,
     OPTION_ODD_SPREG,
     OPTION_NO_ODD_SPREG,
+    OPTION_GINV,
+    OPTION_NO_GINV,
     OPTION_END_OF_ENUM
   };
 
@@ -1585,6 +1587,8 @@ struct option md_longopts[] =
   {"mno-mips16e2", no_argument, NULL, OPTION_NO_MIPS16E2},
   {"mcrc", no_argument, NULL, OPTION_CRC},
   {"mno-crc", no_argument, NULL, OPTION_NO_CRC},
+  {"mginv", no_argument, NULL, OPTION_GINV},
+  {"mno-ginv", no_argument, NULL, OPTION_NO_GINV},
 
   /* Old-style architecture options.  Don't add more of these.  */
   {"m4650", no_argument, NULL, OPTION_M4650},
@@ -1777,6 +1781,11 @@ static const struct mips_ase mips_ases[] = {
     OPTION_CRC, OPTION_NO_CRC,
     6,  6, -1, -1,
     -1 },
+
+  { "ginv", ASE_GINV, 0,
+    OPTION_GINV, OPTION_NO_GINV,
+    6,  6, 6, 6,
+    -1 },
 };
 
 /* The set of ASEs that require -mfp64.  */
@@ -18987,6 +18996,8 @@ mips_convert_ase_flags (int ase)
     ext_ases |= file_ase_mips16 ? AFL_ASE_MIPS16E2 : 0;
   if (ase & ASE_CRC)
     ext_ases |= AFL_ASE_CRC;
+  if (ase & ASE_GINV)
+    ext_ases |= AFL_ASE_GINV;
 
   return ext_ases;
 }
@@ -20004,6 +20015,9 @@ MIPS options:\n\
 -mcrc			generate CRC instructions\n\
 -mno-crc		do not generate CRC instructions\n"));
   fprintf (stream, _("\
+-mginv			generate Global INValidate (GINV) instructions\n\
+-mno-ginv		do not generate Global INValidate instructions\n"));
+  fprintf (stream, _("\
 -minsn32		only generate 32-bit microMIPS instructions\n\
 -mno-insn32		generate all microMIPS instructions\n"));
   fprintf (stream, _("\
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 1c40a1e2aa..493049cf9f 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -423,6 +423,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{-mmt}] [@b{-mno-mt}]
    [@b{-mmcu}] [@b{-mno-mcu}]
    [@b{-mcrc}] [@b{-mno-crc}]
+   [@b{-mginv}] [@b{-mno-ginv}]
    [@b{-minsn32}] [@b{-mno-insn32}]
    [@b{-mfix7000}] [@b{-mno-fix7000}]
    [@b{-mfix-rm7000}] [@b{-mno-fix-rm7000}]
@@ -1519,6 +1520,12 @@ Generate code for the MIPS cyclic redundancy check (CRC) Application
 Specific Extension.  This tells the assembler to accept CRC instructions.
 @samp{-mno-crc} turns off this option.
 
+@item -mginv
+@itemx -mno-ginv
+Generate code for the Global INValidate (GINV) Application Specific
+Extension.  This tells the assembler to accept GINV instructions.
+@samp{-mno-ginv} turns off this option.
+
 @item -minsn32
 @itemx -mno-insn32
 Only use 32-bit instruction encodings when generating code for the
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 36997e9e74..9cbfaf2dd0 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -240,6 +240,12 @@ Generate code for the cyclic redundancy check (CRC) Application Specific
 Extension.  This tells the assembler to accept CRC instructions.
 @samp{-mno-crc} turns off this option.
 
+@item -mginv
+@itemx -mno-ginv
+Generate code for the Global INValidate (GINV) Application Specific
+Extension.  This tells the assembler to accept GINV instructions.
+@samp{-mno-ginv} turns off this option.
+
 @item -minsn32
 @itemx -mno-insn32
 Only use 32-bit instruction encodings when generating code for the
@@ -1124,6 +1130,13 @@ The directive @code{.set crc} makes the assembler accept instructions
 from the CRC Extension from that point on in the assembly.  The
 @code{.set nocrc} directive prevents CRC instructions from being accepted.
 
+@cindex MIPS Global INValidate (GINV) instruction generation override
+@kindex @code{.set ginv}
+@kindex @code{.set noginv}
+The directive @code{.set ginv} makes the assembler accept instructions
+from the GINV Extension from that point on in the assembly.  The
+@code{.set noginv} directive prevents GINV instructions from being accepted.
+
 Traditional MIPS assemblers do not support these directives.
 
 @node MIPS Floating-Point
diff --git a/gas/testsuite/gas/mips/ase-errors-1.l b/gas/testsuite/gas/mips/ase-errors-1.l
index 7f7bba5676..2c9fb9e2e4 100644
--- a/gas/testsuite/gas/mips/ase-errors-1.l
+++ b/gas/testsuite/gas/mips/ase-errors-1.l
@@ -44,3 +44,7 @@
 .*:108: Error: opcode not supported.* `crc32d \$4,\$7,\$4'
 .*:109: Warning: the `crc' extension requires MIPS32 revision 6 or greater
 .*:112: Error: opcode not supported.* `crc32b \$4,\$7,\$4'
+# ----------------------------------------------------------------------------
+.*:117: Warning: the `ginv' extension requires MIPS32 revision 6 or greater
+.*:120: Error: opcode not supported.* `ginvi \$a0'
+# ----------------------------------------------------------------------------
diff --git a/gas/testsuite/gas/mips/ase-errors-1.s b/gas/testsuite/gas/mips/ase-errors-1.s
index 811f719038..8b679a36b4 100644
--- a/gas/testsuite/gas/mips/ase-errors-1.s
+++ b/gas/testsuite/gas/mips/ase-errors-1.s
@@ -111,6 +111,14 @@
 	.set nocrc
 	crc32b $4,$7,$4		# ERROR: crc not enabled
 
+	.set mips32r6
+	.set ginv		# OK
+	ginvi $a0		# OK
+	.set mips32r5		# ERROR: too low
+	ginvt $a0, 1		# OK
+	.set noginv
+	ginvi $a0		# ERROR: ginv not enabled
+
 	# There should be no errors after this.
 	.set fp=32
 	.set mips1
diff --git a/gas/testsuite/gas/mips/ase-errors-2.l b/gas/testsuite/gas/mips/ase-errors-2.l
index 652c27cc7c..6ac51630d4 100644
--- a/gas/testsuite/gas/mips/ase-errors-2.l
+++ b/gas/testsuite/gas/mips/ase-errors-2.l
@@ -36,3 +36,7 @@
 .*:93: Warning: the `crc' extension requires MIPS64 revision 6 or greater
 .*:97: Error: opcode not supported.* `crc32b \$4,\$7,\$4'
 .*:98: Error: opcode not supported.* `crc32d \$4,\$7,\$4'
+# ----------------------------------------------------------------------------
+.*:103: Warning: the `ginv' extension requires MIPS64 revision 6 or greater
+.*:106: Error: opcode not supported.* `ginvi \$a0'
+# ----------------------------------------------------------------------------
diff --git a/gas/testsuite/gas/mips/ase-errors-2.s b/gas/testsuite/gas/mips/ase-errors-2.s
index 7ef363e315..2b31517e6e 100644
--- a/gas/testsuite/gas/mips/ase-errors-2.s
+++ b/gas/testsuite/gas/mips/ase-errors-2.s
@@ -97,6 +97,14 @@
 	crc32b $4,$7,$4		# ERROR: crc not enabled
 	crc32d $4,$7,$4		# ERROR: crc not enabled
 
+	.set mips64r6
+	.set ginv		# OK
+	ginvi $a0		# OK
+	.set mips64r5		# ERROR: too low
+	ginvt $a0,1		# OK
+	.set noginv
+	ginvi $a0		# ERROR: ginv not enabled
+
 	# There should be no errors after this.
 	.set fp=32
 	.set mips4
diff --git a/gas/testsuite/gas/mips/ginv-err.d b/gas/testsuite/gas/mips/ginv-err.d
new file mode 100644
index 0000000000..68c4096976
--- /dev/null
+++ b/gas/testsuite/gas/mips/ginv-err.d
@@ -0,0 +1,3 @@
+#name: MIPS GINV instruction errors
+#as: -32 -mginv
+#error-output: ginv-err.l
diff --git a/gas/testsuite/gas/mips/ginv-err.l b/gas/testsuite/gas/mips/ginv-err.l
new file mode 100644
index 0000000000..dbbb70c469
--- /dev/null
+++ b/gas/testsuite/gas/mips/ginv-err.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:3: Error: invalid operands `ginvi 2'
+.*:4: Error: invalid operands `ginvt 3,3'
+.*:5: Error: operand 2 out of range `ginvt \$4,4'
diff --git a/gas/testsuite/gas/mips/ginv-err.s b/gas/testsuite/gas/mips/ginv-err.s
new file mode 100644
index 0000000000..769fde37d9
--- /dev/null
+++ b/gas/testsuite/gas/mips/ginv-err.s
@@ -0,0 +1,5 @@
+	.text
+test:
+	ginvi	2
+	ginvt	3,3
+	ginvt	$4,4
diff --git a/gas/testsuite/gas/mips/ginv.d b/gas/testsuite/gas/mips/ginv.d
new file mode 100644
index 0000000000..1cb295528e
--- /dev/null
+++ b/gas/testsuite/gas/mips/ginv.d
@@ -0,0 +1,18 @@
+#objdump: -pdr --prefix-addresses --show-raw-insn
+#name: MIPS GINV
+#as: -mginv -32
+
+# Test GINV instructions.
+
+.*: +file format .*mips.*
+#...
+ASEs:
+#...
+	GINV ASE
+#...
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 7c40003d 	ginvi	v0
+[0-9a-f]+ <[^>]*> 7c6000bd 	ginvt	v1,0x0
+[0-9a-f]+ <[^>]*> 7c8001bd 	ginvt	a0,0x1
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/ginv.s b/gas/testsuite/gas/mips/ginv.s
new file mode 100644
index 0000000000..63cfb15002
--- /dev/null
+++ b/gas/testsuite/gas/mips/ginv.s
@@ -0,0 +1,9 @@
+	.text
+test:
+	ginvi	$2
+	ginvt	$3,0
+	ginvt	$4,1
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	2
+	.space	8
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 47e923b6da..786168d3b8 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -2061,4 +2061,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "crc-err"	[mips_arch_list_matching mips32r6]
     run_dump_test_arches "crc64"	[mips_arch_list_matching mips64r6]
     run_dump_test_arches "crc64-err"	[mips_arch_list_matching mips64r6]
+
+    run_dump_test_arches "ginv"	[mips_arch_list_matching mips32r6]
+    run_dump_test_arches "ginv-err"	[mips_arch_list_matching mips32r6]
 }